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19b9fc2a39
We were using S32 | U32 for add2/sub2. But the ALGFI and SLGFI insns that implement this both have uint32_t immediates. This makes the composite range balanced and enables use of -0xffffffff ... -0x80000001. Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
28 lines
703 B
C
28 lines
703 B
C
/* SPDX-License-Identifier: MIT */
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/*
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* Define S390 target-specific operand constraints.
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* Copyright (c) 2021 Linaro
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*/
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/*
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* Define constraint letters for register sets:
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* REGS(letter, register_mask)
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*/
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REGS('r', ALL_GENERAL_REGS)
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REGS('v', ALL_VECTOR_REGS)
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REGS('o', 0xaaaa) /* odd numbered general regs */
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/*
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* Define constraint letters for constants:
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* CONST(letter, TCG_CT_CONST_* bit set)
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*/
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CONST('C', TCG_CT_CONST_CMP)
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CONST('I', TCG_CT_CONST_S16)
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CONST('J', TCG_CT_CONST_S32)
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CONST('K', TCG_CT_CONST_P32)
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CONST('M', TCG_CT_CONST_M1)
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CONST('N', TCG_CT_CONST_INV)
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CONST('R', TCG_CT_CONST_INVRISBG)
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CONST('U', TCG_CT_CONST_U32)
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CONST('V', TCG_CT_CONST_N32)
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CONST('Z', TCG_CT_CONST_ZERO)
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