qemu/target/riscv/tcg
Paolo Bonzini 5fd23f20e1 target/riscv: store RISCVCPUDef struct directly in the class
Prepare for adding more fields to RISCVCPUDef and reading them in
riscv_cpu_init: instead of storing the misa_mxl_max field in
RISCVCPUClass, ensure that there's always a valid RISCVCPUDef struct
and go through it.

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-05-20 08:18:53 +02:00
..
meson.build target/riscv: introduce TCG AccelCPUClass 2023-10-12 11:55:21 +10:00
tcg-cpu.c target/riscv: store RISCVCPUDef struct directly in the class 2025-05-20 08:18:53 +02:00
tcg-cpu.h target/riscv: Remove AccelCPUClass::cpu_class_init need 2025-04-23 15:07:32 -07:00