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The TYPE_AARCH64_CPU class is an abstract type that is the parent of all the AArch64 CPUs. It now has no special behaviour of its own, so we can eliminate it and make the AArch64 CPUs directly inherit from TYPE_ARM_CPU. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20250429132200.605611-8-peter.maydell@linaro.org
58 lines
1.8 KiB
C
58 lines
1.8 KiB
C
/*
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* QEMU ARM CPU QOM header (target agnostic)
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*
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* Copyright (c) 2012 SUSE LINUX Products GmbH
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, see
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* <http://www.gnu.org/licenses/gpl-2.0.html>
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*/
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#ifndef QEMU_ARM_CPU_QOM_H
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#define QEMU_ARM_CPU_QOM_H
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#include "hw/core/cpu.h"
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#define TYPE_ARM_CPU "arm-cpu"
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OBJECT_DECLARE_CPU_TYPE(ARMCPU, ARMCPUClass, ARM_CPU)
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#define TYPE_ARM_MAX_CPU "max-" TYPE_ARM_CPU
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#define ARM_CPU_TYPE_SUFFIX "-" TYPE_ARM_CPU
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#define ARM_CPU_TYPE_NAME(name) (name ARM_CPU_TYPE_SUFFIX)
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/* Meanings of the ARMCPU object's seven inbound GPIO lines */
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#define ARM_CPU_IRQ 0
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#define ARM_CPU_FIQ 1
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#define ARM_CPU_VIRQ 2
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#define ARM_CPU_VFIQ 3
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#define ARM_CPU_NMI 4
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#define ARM_CPU_VINMI 5
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#define ARM_CPU_VFNMI 6
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/* For M profile, some registers are banked secure vs non-secure;
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* these are represented as a 2-element array where the first element
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* is the non-secure copy and the second is the secure copy.
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* When the CPU does not have implement the security extension then
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* only the first element is used.
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* This means that the copy for the current security state can be
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* accessed via env->registerfield[env->v7m.secure] (whether the security
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* extension is implemented or not).
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*/
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enum {
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M_REG_NS = 0,
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M_REG_S = 1,
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M_REG_NUM_BANKS = 2,
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};
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#endif
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