mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-08-01 14:53:54 -06:00
a6c0102a86
arm_set_mte_tcf0() uses the abi_long type which is defined
in "user/abitypes.h". Include it in order to avoid when
refactoring:
In file included from ../../target/arm/gdbstub64.c:28:
../linux-user/aarch64/mte_user_helper.h:30:42: error: unknown type name ‘abi_long’; did you mean ‘u_long’?
30 | void arm_set_mte_tcf0(CPUArchState *env, abi_long value);
| ^~~~~~~~
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20241212185341.2857-3-philmd@linaro.org>
34 lines
1 KiB
C
34 lines
1 KiB
C
/*
|
|
* ARM MemTag convenience functions.
|
|
*
|
|
* This code is licensed under the GNU GPL v2 or later.
|
|
*
|
|
* SPDX-License-Identifier: LGPL-2.1-or-later
|
|
*/
|
|
|
|
#ifndef AARCH64_MTE_USER_HELPER_H
|
|
#define AARCH64_MTE USER_HELPER_H
|
|
|
|
#include "user/abitypes.h"
|
|
|
|
#ifndef PR_MTE_TCF_SHIFT
|
|
# define PR_MTE_TCF_SHIFT 1
|
|
# define PR_MTE_TCF_NONE (0UL << PR_MTE_TCF_SHIFT)
|
|
# define PR_MTE_TCF_SYNC (1UL << PR_MTE_TCF_SHIFT)
|
|
# define PR_MTE_TCF_ASYNC (2UL << PR_MTE_TCF_SHIFT)
|
|
# define PR_MTE_TCF_MASK (3UL << PR_MTE_TCF_SHIFT)
|
|
# define PR_MTE_TAG_SHIFT 3
|
|
# define PR_MTE_TAG_MASK (0xffffUL << PR_MTE_TAG_SHIFT)
|
|
#endif
|
|
|
|
/**
|
|
* arm_set_mte_tcf0 - Set TCF0 field in SCTLR_EL1 register
|
|
* @env: The CPU environment
|
|
* @value: The value to be set for the Tag Check Fault in EL0 field.
|
|
*
|
|
* Only SYNC and ASYNC modes can be selected. If ASYMM mode is given, the SYNC
|
|
* mode is selected instead. So, there is no way to set the ASYMM mode.
|
|
*/
|
|
void arm_set_mte_tcf0(CPUArchState *env, abi_long value);
|
|
|
|
#endif /* AARCH64_MTE_USER_HELPER_H */
|