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80e28a4147
The timebase in ppc started out with the mftb instruction which is like mfspr but addressed timebase registers (TBRs) rather than SPRs. These instructions could be used to read TB and TBU at 268 and 269. Timebase could be written via the TBL and TBU SPRs at 284 and 285. The ISA changed around v2.03 to bring TB and TBU reads into the SPR space at 268 and 269 (access via mftb TBR-space is still supported but will be phased out). Later, VTB was added which is an entirely different register. The SPR number defines in QEMU are understandably inconsistently named. Change SPR 268, 269, 284, 285 to TBL, TBU, WR_TBL, WR_TBU, respectively. Reviewed-by: Cédric Le Goater <clg@kaod.org> Signed-off-by: Nicholas Piggin <npiggin@gmail.com> |
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| alpha | ||
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| avr | ||
| cris | ||
| hexagon | ||
| hppa | ||
| i386 | ||
| loongarch | ||
| m68k | ||
| microblaze | ||
| mips | ||
| nios2 | ||
| openrisc | ||
| ppc | ||
| riscv | ||
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| s390x | ||
| sh4 | ||
| sparc | ||
| tricore | ||
| xtensa | ||
| Kconfig | ||
| meson.build | ||
| target-common.c | ||