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Paolo Bonzini 77a2dba45c target/i386/emulate: stop overloading decode->op[N].ptr 
decode->op[N].ptr can contain either a host pointer (!) in CPUState
or a guest virtual address.  Pass the whole struct to read_val_ext
and write_val_ext, so that it can decide the contents based on the
operand type.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2025-05-12 17:48:32 +02:00
..
alpha target/migration: Inline VMSTATE_CPU() 2025-05-08 14:22:12 +02:00
arm * ci: enable RISC-V cross jobs 2025-05-07 16:10:59 -04:00
avr accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
hexagon accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
hppa target/migration: Inline VMSTATE_CPU() 2025-05-08 14:22:12 +02:00
i386 target/i386/emulate: stop overloading decode->op[N].ptr 2025-05-12 17:48:32 +02:00
loongarch accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
m68k accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
microblaze target/migration: Inline VMSTATE_CPU() 2025-05-08 14:22:12 +02:00
mips accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
openrisc target/migration: Inline VMSTATE_CPU() 2025-05-08 14:22:12 +02:00
ppc * ci: enable RISC-V cross jobs 2025-05-07 16:10:59 -04:00
riscv accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
rx accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
s390x * ci: enable RISC-V cross jobs 2025-05-07 16:10:59 -04:00
sh4 accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
sparc accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
tricore accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
xtensa accel/tcg: Move cpu_get_tb_cpu_state to TCGCPUOps 2025-04-30 12:45:05 -07:00
Kconfig target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00
meson.build target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00