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The Device Control Registers (DCR) of on-SoC devices are accessed by software through the use of the mtdcr and mfdcr instructions. These are converted in transactions on a side band bus, the DCR bus, which connects the on-SoC devices to the CPU. Ideally, we should model these accesses with a DCR namespace and DCR memory regions but today the DCR handlers are installed in a DCR table under the CPU. Instead, introduce a little device model wrapper to hold a CPU link and handle registration of DCR handlers. The DCR device inherits from SysBus because most of these devices also have MMIO regions and/or IRQs. Being a SysBusDevice makes things easier to install the device model in the overall SoC. Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com> Signed-off-by: Cédric Le Goater <clg@kaod.org> [balaton: Explicit opaque parameter for dcr callbacks] Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Message-Id: <9b21bdf55e0a728f093bad299e030d98f302ded0.1660746880.git.balaton@eik.bme.hu> Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com> |
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| .. | ||
| fdt.h | ||
| mac_dbdma.h | ||
| openpic.h | ||
| openpic_kvm.h | ||
| pef.h | ||
| pnv.h | ||
| pnv_core.h | ||
| pnv_homer.h | ||
| pnv_lpc.h | ||
| pnv_occ.h | ||
| pnv_pnor.h | ||
| pnv_psi.h | ||
| pnv_sbe.h | ||
| pnv_xive.h | ||
| pnv_xscom.h | ||
| ppc.h | ||
| ppc4xx.h | ||
| ppc_e500.h | ||
| spapr.h | ||
| spapr_cpu_core.h | ||
| spapr_drc.h | ||
| spapr_irq.h | ||
| spapr_numa.h | ||
| spapr_nvdimm.h | ||
| spapr_ovec.h | ||
| spapr_rtas.h | ||
| spapr_tpm_proxy.h | ||
| spapr_vio.h | ||
| spapr_xive.h | ||
| vof.h | ||
| xics.h | ||
| xics_spapr.h | ||
| xive.h | ||
| xive2.h | ||
| xive2_regs.h | ||
| xive_regs.h | ||