Andrew Jones 6fa8a37949 target/arm/cpu64: max cpu: Support sve properties with KVM ... Extend the SVE vq map initialization and validation with KVM's supported vector lengths when KVM is enabled. In order to determine and select supported lengths we add two new KVM functions for getting and setting the KVM_REG_ARM64_SVE_VLS pseudo-register. This patch has been co-authored with Richard Henderson, who reworked the target/arm/cpu64.c changes in order to push all the validation and auto-enabling/disabling steps into the finalizer, resulting in a nice LOC reduction. Signed-off-by: Andrew Jones <drjones@redhat.com> Reviewed-by: Eric Auger <eric.auger@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Masayoshi Mizuma <m.mizuma@jp.fujitsu.com> Message-id: 20191031142734.8590-9-drjones@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2019-11-01 20:40:59 +00:00
..
alpha	target/alpha: fetch code with translator_ld	2019-10-28 15:12:38 +00:00
arm	target/arm/cpu64: max cpu: Support sve properties with KVM	2019-11-01 20:40:59 +00:00
cris	cputlb: ensure _cmmu helper functions follow the naming standard	2019-10-28 15:12:38 +00:00
hppa	target/hppa: fetch code with translator_ld	2019-10-28 15:12:38 +00:00
i386	target/i386: fetch code with translator_ld	2019-10-28 15:12:38 +00:00
lm32	Monitor patches for 2019-08-21	2019-08-22 10:31:21 +01:00
m68k	target/m68k: fetch code with translator_ld	2019-10-28 15:12:38 +00:00
microblaze	tcg: TCGMemOp is now accelerator independent MemOp	2019-09-03 08:30:38 -07:00
mips	target/mips: Refactor handling of vector compare 'less than' (signed) instructions	2019-10-25 18:37:01 +02:00
moxie	hw/core: Move cpu.c, cpu.h from qom/ to hw/core/	2019-08-21 13:24:01 +02:00
nios2	Monitor patches for 2019-08-21	2019-08-22 10:31:21 +01:00
openrisc	target/openrisc: fetch code with translator_ld	2019-10-28 15:12:38 +00:00
ppc	target/ppc: fetch code with translator_ld	2019-10-28 15:12:38 +00:00
riscv	TCG Plugins initial implementation	2019-10-30 14:10:32 +00:00
s390x	s390x/kvm: Set default cpu model for all machine classes	2019-10-21 18:03:08 +02:00
sh4	target/sh4: fetch code with translator_ld	2019-10-28 15:12:38 +00:00
sparc	target/sparc: fetch code with translator_ld	2019-10-28 15:12:38 +00:00
tilegx	tcg: TCGMemOp is now accelerator independent MemOp	2019-09-03 08:30:38 -07:00
tricore	tcg: TCGMemOp is now accelerator independent MemOp	2019-09-03 08:30:38 -07:00
unicore32	Monitor patches for 2019-08-21	2019-08-22 10:31:21 +01:00
xtensa	target/xtensa: fetch code with translator_ld	2019-10-28 15:12:38 +00:00