qemu/target/loongarch
Stefan Hajnoczi 98721058d6 * target/i386/kvm: Intel TDX support
* target/i386/emulate: more lflags cleanups
 * meson: remove need for explicit listing of dependencies in hw_common_arch and
   target_common_arch
 * rust: small fixes
 * hpet: Reorganize register decoding to be more similar to Rust code
 * target/i386: fixes for AMD models
 * target/i386: new EPYC-Turin CPU model
 -----BEGIN PGP SIGNATURE-----
 
 iQFIBAABCgAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmg4BxwUHHBib256aW5p
 QHJlZGhhdC5jb20ACgkQv/vSX3jHroP67gf+PEP4EDQP0AJUfxXYVsczGf5snGjz
 ro8jYmKG+huBZcrS6uPK5zHYxtOI9bHr4ipTHJyHd61lyzN6Ys9amPbs/CRE2Q4x
 Ky4AojPhCuaL2wHcYNcu41L+hweVQ3myj97vP3hWvkatulXYeMqW3/4JZgr4WZ69
 A9LGLtLabobTz5yLc8x6oHLn/BZ2y7gjd2LzTz8bqxx7C/kamjoDrF2ZHbX9DLQW
 BKWQ3edSO6rorSNHWGZsy9BE20AEkW2LgJdlV9eXglFEuEs6cdPKwGEZepade4bQ
 Rdt2gHTlQdUDTFmAbz8pttPxFGMC9Zpmb3nnicKJpKQAmkT/x4k9ncjyAQ==
 =XmkU
 -----END PGP SIGNATURE-----

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* target/i386/kvm: Intel TDX support
* target/i386/emulate: more lflags cleanups
* meson: remove need for explicit listing of dependencies in hw_common_arch and
  target_common_arch
* rust: small fixes
* hpet: Reorganize register decoding to be more similar to Rust code
* target/i386: fixes for AMD models
* target/i386: new EPYC-Turin CPU model

# -----BEGIN PGP SIGNATURE-----
#
# iQFIBAABCgAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmg4BxwUHHBib256aW5p
# QHJlZGhhdC5jb20ACgkQv/vSX3jHroP67gf+PEP4EDQP0AJUfxXYVsczGf5snGjz
# ro8jYmKG+huBZcrS6uPK5zHYxtOI9bHr4ipTHJyHd61lyzN6Ys9amPbs/CRE2Q4x
# Ky4AojPhCuaL2wHcYNcu41L+hweVQ3myj97vP3hWvkatulXYeMqW3/4JZgr4WZ69
# A9LGLtLabobTz5yLc8x6oHLn/BZ2y7gjd2LzTz8bqxx7C/kamjoDrF2ZHbX9DLQW
# BKWQ3edSO6rorSNHWGZsy9BE20AEkW2LgJdlV9eXglFEuEs6cdPKwGEZepade4bQ
# Rdt2gHTlQdUDTFmAbz8pttPxFGMC9Zpmb3nnicKJpKQAmkT/x4k9ncjyAQ==
# =XmkU
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 29 May 2025 03:05:00 EDT
# gpg:                using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg:                issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg:                 aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4  E2F7 7E15 100C CD36 69B1
#      Subkey fingerprint: F133 3857 4B66 2389 866C  7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (77 commits)
  target/i386/tcg/helper-tcg: fix file references in comments
  target/i386: Add support for EPYC-Turin model
  target/i386: Update EPYC-Genoa for Cache property, perfmon-v2, RAS and SVM feature bits
  target/i386: Add couple of feature bits in CPUID_Fn80000021_EAX
  target/i386: Update EPYC-Milan CPU model for Cache property, RAS, SVM feature bits
  target/i386: Update EPYC-Rome CPU model for Cache property, RAS, SVM feature bits
  target/i386: Update EPYC CPU model for Cache property, RAS, SVM feature bits
  rust: make declaration of dependent crates more consistent
  docs: Add TDX documentation
  i386/tdx: Validate phys_bits against host value
  i386/tdx: Make invtsc default on
  i386/tdx: Don't treat SYSCALL as unavailable
  i386/tdx: Fetch and validate CPUID of TD guest
  target/i386: Print CPUID subleaf info for unsupported feature
  i386: Remove unused parameter "uint32_t bit" in feature_word_description()
  i386/cgs: Introduce x86_confidential_guest_check_features()
  i386/tdx: Define supported KVM features for TDX
  i386/tdx: Add XFD to supported bit of TDX
  i386/tdx: Add supported CPUID bits relates to XFAM
  i386/tdx: Add supported CPUID bits related to TD Attributes
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
2025-05-30 11:41:07 -04:00
..
kvm kvm: Introduce kvm_arch_pre_create_vcpu() 2025-05-28 19:01:40 +02:00
tcg include: Remove 'exec/exec-all.h' 2025-04-30 12:45:05 -07:00
arch_dump.c include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
cpu-csr.h target/loongarch: Fix tlb huge page loading issue 2024-03-20 10:20:03 +08:00
cpu-param.h tcg: Remove the TCG_GUEST_DEFAULT_MO definition globally 2025-04-23 15:07:32 -07:00
cpu-qom.h target: Move ArchCPUClass definition to 'cpu.h' 2023-11-07 13:08:48 +01:00
cpu.c target/loongarch: Fill in TCGCPUOps.pointer_wrap 2025-05-28 08:08:48 +01:00
cpu.h accel/tcg: Hoist cpu_get_tb_cpu_state decl to accl/tcg/cpu-ops.h 2025-04-30 12:45:05 -07:00
cpu_helper.c pull-loongarch-20230424 2025-04-24 13:44:39 -04:00
csr.c target/loongarch: Dump all generic CSR registers 2025-01-24 14:49:24 +08:00
csr.h target/loongarch: Dump all generic CSR registers 2025-01-24 14:49:24 +08:00
disas.c target/loongarch: honour show_opcodes when disassembling 2024-03-06 12:35:51 +00:00
gdbstub.c target/loongarch/gdbstub: Fix gdbstub incorrectly handling some registers 2025-02-25 16:05:31 +08:00
helper.h target/loongarch: Move header file helper.h to directory tcg 2025-04-24 09:58:18 +08:00
insns.decode target/loongarch: Add preldx instruction 2023-10-13 09:50:16 +08:00
internals.h target/loongarch: Move definition of TCG specified function to tcg directory 2025-04-24 10:09:38 +08:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
loongarch-qmp-cmds.c qapi: make most CPU commands unconditionally available 2025-05-28 18:55:50 +02:00
machine.c include: Rename sysemu/ -> system/ 2024-12-20 17:44:56 +01:00
meson.build target/loongarch: Add common source file for CSR register 2025-01-24 14:49:24 +08:00
README docs/system/loongarch: Update the LoongArch document 2022-08-13 04:45:03 -07:00
trace-events target/loongarch: Implement set vcpu intr for kvm 2024-01-11 19:22:32 +08:00
trace.h target/loongarch: Implement kvm get/set registers 2024-01-11 19:14:00 +08:00
translate.h target/loongarch: Add CRC feature flag and use it to gate CRC instructions 2025-04-24 10:46:31 +08:00
vec.h target/loongarch: Move simply DO_XX marcos togther 2023-09-20 14:33:43 +08:00

- Introduction

  LoongArch is the general processor architecture of Loongson.

  The following versions of the LoongArch core are supported
    core: 3A5000
    https://github.com/loongson/LoongArch-Documentation/releases/download/2021.08.17/LoongArch-Vol1-v1.00-EN.pdf

  We can get the latest loongarch documents at https://github.com/loongson/LoongArch-Documentation/tags.


- System emulation

  You can reference docs/system/loongarch/loongson3.rst to get the information about system emulation of LoongArch.

- Linux-user emulation

  We already support Linux user emulation. We can use LoongArch cross-tools to build LoongArch executables on X86 machines,
  and We can also use qemu-loongarch64 to run LoongArch executables.

  1. Config cross-tools env.

     see System emulation.

  2. Test tests/tcg/multiarch.

     ./configure  --static  --prefix=/usr  --disable-werror --target-list="loongarch64-linux-user" --enable-debug

     cd build

     make && make check-tcg

  3. Run LoongArch system basic command with loongarch-clfs-system.

     - Config clfs env.

       wget https://github.com/loongson/build-tools/releases/download/2022.05.29/loongarch64-clfs-system-5.0.tar.bz2

       tar -vxf loongarch64-clfs-system-5.0.tar.bz2 -C /opt/clfs

       cp /opt/clfs/lib64/ld-linux-loongarch-lp64d.so.1  /lib64

       export LD_LIBRARY_PATH="/opt/clfs/lib64"

     - Run LoongArch system basic command.

       ./qemu-loongarch64  /opt/clfs/usr/bin/bash
       ./qemu-loongarch64  /opt/clfs/usr/bin/ls
       ./qemu-loongarch64  /opt/clfs/usr/bin/pwd

- Note.
  We can get the latest LoongArch documents or LoongArch tools at https://github.com/loongson/