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66b1205bc5
Currently, the fdt is copied to the ROM after the reset vector. The firmware has to copy it to DRAM. Instead of this, directly copy the device tree to a pre-computed dram address. The device tree load address should be as far as possible from kernel and initrd images. That's why it is kept at the end of the DRAM or 4GB whichever is lesser. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Tested-by: Bin Meng <bin.meng@windriver.com> Message-Id: <20200701183949.398134-3-atish.patra@wdc.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
226 lines
7.4 KiB
C
226 lines
7.4 KiB
C
/*
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* QEMU RISC-V Boot Helper
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*
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* Copyright (c) 2017 SiFive, Inc.
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* Copyright (c) 2019 Alistair Francis <alistair.francis@wdc.com>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2 or later, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "qemu-common.h"
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#include "qemu/units.h"
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#include "qemu/error-report.h"
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#include "exec/cpu-defs.h"
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#include "hw/boards.h"
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#include "hw/loader.h"
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#include "hw/riscv/boot.h"
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#include "elf.h"
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#include "sysemu/device_tree.h"
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#include "sysemu/qtest.h"
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#include <libfdt.h>
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#if defined(TARGET_RISCV32)
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# define KERNEL_BOOT_ADDRESS 0x80400000
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#else
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# define KERNEL_BOOT_ADDRESS 0x80200000
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#endif
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void riscv_find_and_load_firmware(MachineState *machine,
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const char *default_machine_firmware,
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hwaddr firmware_load_addr,
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symbol_fn_t sym_cb)
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{
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char *firmware_filename = NULL;
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if ((!machine->firmware) || (!strcmp(machine->firmware, "default"))) {
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/*
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* The user didn't specify -bios, or has specified "-bios default".
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* That means we are going to load the OpenSBI binary included in
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* the QEMU source.
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*/
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firmware_filename = riscv_find_firmware(default_machine_firmware);
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} else if (strcmp(machine->firmware, "none")) {
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firmware_filename = riscv_find_firmware(machine->firmware);
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}
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if (firmware_filename) {
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/* If not "none" load the firmware */
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riscv_load_firmware(firmware_filename, firmware_load_addr, sym_cb);
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g_free(firmware_filename);
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}
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}
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char *riscv_find_firmware(const char *firmware_filename)
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{
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char *filename;
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filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, firmware_filename);
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if (filename == NULL) {
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if (!qtest_enabled()) {
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/*
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* We only ship plain binary bios images in the QEMU source.
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* With Spike machine that uses ELF images as the default bios,
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* running QEMU test will complain hence let's suppress the error
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* report for QEMU testing.
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*/
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error_report("Unable to load the RISC-V firmware \"%s\"",
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firmware_filename);
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exit(1);
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}
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}
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return filename;
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}
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target_ulong riscv_load_firmware(const char *firmware_filename,
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hwaddr firmware_load_addr,
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symbol_fn_t sym_cb)
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{
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uint64_t firmware_entry, firmware_start, firmware_end;
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if (load_elf_ram_sym(firmware_filename, NULL, NULL, NULL,
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&firmware_entry, &firmware_start, &firmware_end, NULL,
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0, EM_RISCV, 1, 0, NULL, true, sym_cb) > 0) {
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return firmware_entry;
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}
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if (load_image_targphys_as(firmware_filename, firmware_load_addr,
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ram_size, NULL) > 0) {
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return firmware_load_addr;
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}
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error_report("could not load firmware '%s'", firmware_filename);
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exit(1);
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}
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target_ulong riscv_load_kernel(const char *kernel_filename, symbol_fn_t sym_cb)
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{
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uint64_t kernel_entry, kernel_high;
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if (load_elf_ram_sym(kernel_filename, NULL, NULL, NULL,
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&kernel_entry, NULL, &kernel_high, NULL, 0,
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EM_RISCV, 1, 0, NULL, true, sym_cb) > 0) {
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return kernel_entry;
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}
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if (load_uimage_as(kernel_filename, &kernel_entry, NULL, NULL,
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NULL, NULL, NULL) > 0) {
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return kernel_entry;
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}
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if (load_image_targphys_as(kernel_filename, KERNEL_BOOT_ADDRESS,
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ram_size, NULL) > 0) {
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return KERNEL_BOOT_ADDRESS;
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}
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error_report("could not load kernel '%s'", kernel_filename);
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exit(1);
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}
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hwaddr riscv_load_initrd(const char *filename, uint64_t mem_size,
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uint64_t kernel_entry, hwaddr *start)
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{
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int size;
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/*
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* We want to put the initrd far enough into RAM that when the
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* kernel is uncompressed it will not clobber the initrd. However
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* on boards without much RAM we must ensure that we still leave
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* enough room for a decent sized initrd, and on boards with large
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* amounts of RAM we must avoid the initrd being so far up in RAM
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* that it is outside lowmem and inaccessible to the kernel.
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* So for boards with less than 256MB of RAM we put the initrd
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* halfway into RAM, and for boards with 256MB of RAM or more we put
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* the initrd at 128MB.
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*/
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*start = kernel_entry + MIN(mem_size / 2, 128 * MiB);
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size = load_ramdisk(filename, *start, mem_size - *start);
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if (size == -1) {
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size = load_image_targphys(filename, *start, mem_size - *start);
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if (size == -1) {
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error_report("could not load ramdisk '%s'", filename);
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exit(1);
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}
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}
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return *start + size;
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}
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uint32_t riscv_load_fdt(hwaddr dram_base, uint64_t mem_size, void *fdt)
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{
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uint32_t temp, fdt_addr;
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hwaddr dram_end = dram_base + mem_size;
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int fdtsize = fdt_totalsize(fdt);
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if (fdtsize <= 0) {
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error_report("invalid device-tree");
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exit(1);
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}
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/*
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* We should put fdt as far as possible to avoid kernel/initrd overwriting
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* its content. But it should be addressable by 32 bit system as well.
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* Thus, put it at an aligned address that less than fdt size from end of
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* dram or 4GB whichever is lesser.
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*/
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temp = MIN(dram_end, 4096 * MiB);
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fdt_addr = QEMU_ALIGN_DOWN(temp - fdtsize, 2 * MiB);
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fdt_pack(fdt);
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/* copy in the device tree */
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qemu_fdt_dumpdtb(fdt, fdtsize);
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rom_add_blob_fixed_as("fdt", fdt, fdtsize, fdt_addr,
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&address_space_memory);
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return fdt_addr;
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}
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void riscv_setup_rom_reset_vec(hwaddr start_addr, hwaddr rom_base,
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hwaddr rom_size,
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uint32_t fdt_load_addr, void *fdt)
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{
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int i;
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/* reset vector */
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uint32_t reset_vec[10] = {
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0x00000297, /* 1: auipc t0, %pcrel_hi(dtb) */
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0xf1402573, /* csrr a0, mhartid */
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#if defined(TARGET_RISCV32)
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0x0202a583, /* lw a1, 32(t0) */
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0x0182a283, /* lw t0, 24(t0) */
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#elif defined(TARGET_RISCV64)
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0x0202b583, /* ld a1, 32(t0) */
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0x0182b283, /* ld t0, 24(t0) */
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#endif
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0x00028067, /* jr t0 */
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0x00000000,
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start_addr, /* start: .dword */
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0x00000000,
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fdt_load_addr, /* fdt_laddr: .dword */
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0x00000000,
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/* dtb: */
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};
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/* copy in the reset vector in little_endian byte order */
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for (i = 0; i < ARRAY_SIZE(reset_vec); i++) {
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reset_vec[i] = cpu_to_le32(reset_vec[i]);
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}
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rom_add_blob_fixed_as("mrom.reset", reset_vec, sizeof(reset_vec),
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rom_base, &address_space_memory);
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return;
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}
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