qemu/target-mips
Aurelien Jarno 5dbe90bba7 target-mips: fix FPU exceptions
For each FPU instruction that can trigger an FPU exception, to call
call update_fcr31() after.

Remove the manual NaN assignment in case of float to float operation, as
softfloat is already taking care of that. However for float to int
operation, the value has to be changed to the MIPS one. In the cvtpw_ps
case, the two registers have to be handled separately to guarantee
a correct final value in both registers.

Reviewed-by: Richard Henderson <rth@twiddle.net>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
2012-10-31 22:20:46 +01:00
..
cpu-qom.h target-mips: QOM'ify CPU 2012-04-30 11:32:13 +02:00
cpu.c target-mips: Start QOM'ifying CPU init 2012-04-30 11:32:13 +02:00
cpu.h target-mips: Add ASE DSP resources access check 2012-10-31 20:24:06 +01:00
dsp_helper.c target-mips: Add ASE DSP accumulator instructions 2012-10-31 21:37:20 +01:00
helper.c target-mips: Add ASE DSP resources access check 2012-10-31 20:24:06 +01:00
helper.h target-mips: use the softfloat floatXX_muladd functions 2012-10-31 22:20:45 +01:00
lmi_helper.c target-mips: Implement Loongson Multimedia Instructions 2012-09-19 21:40:48 +02:00
machine.c target-mips: Don't overuse CPUState 2012-03-14 22:20:25 +01:00
Makefile.objs target-mips: Add ASE DSP internal functions 2012-10-31 20:24:05 +01:00
mips-defs.h MIPS: Initial support of fulong mini pc (CPU definition) 2010-06-29 23:07:52 +02:00
op_helper.c target-mips: fix FPU exceptions 2012-10-31 22:20:46 +01:00
TODO target-mips: Change TODO file 2012-10-31 21:37:24 +01:00
translate.c target-mips: use the softfloat floatXX_muladd functions 2012-10-31 22:20:45 +01:00
translate_init.c target-mips: Add ASE DSP processors 2012-10-31 21:37:20 +01:00