motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-09 02:24:58 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions
qemu/target/i386
History
Sean Christopherson 5c76b651d0 i386: Add primary SGX CPUID and MSR defines 
Add CPUID defines for SGX and SGX Launch Control (LC), as well as
defines for their associated FEATURE_CONTROL MSR bits.  Define the
Launch Enclave Public Key Hash MSRs (LE Hash MSRs), which exist
when SGX LC is present (in CPUID), and are writable when SGX LC is
enabled (in FEATURE_CONTROL).

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Message-Id: <20210719112136.57018-7-yang.zhong@intel.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-09-30 14:50:20 +02:00
..
hax numa: Teach ram block notifiers about resizeable ram blocks 2021-05-13 18:21:13 +01:00
hvf hvf: Add Apple Silicon support 2021-09-20 09:57:03 +01:00
kvm migration: Unify failure check for migrate_add_blocker() 2021-08-26 17:15:28 +02:00
nvmm Fix nvmm_ram_block_added() function arguments 2021-09-13 13:56:26 +02:00
tcg target/i386: Move x86_cpu_exec_interrupt() under sysemu/ folder 2021-09-14 12:00:21 -07:00
whpx migration: Unify failure check for migrate_add_blocker() 2021-08-26 17:15:28 +02:00
arch_dump.c dump: add kernel_gs_base to QEMU CPU state 2018-07-16 16:13:34 +02:00
arch_memory_mapping.c exec,dump,i386,ppc,s390x: don't include exec/cpu-all.h explicitly 2017-09-19 18:21:33 +02:00
cpu-dump.c i386/cpu_dump: support AVX512 ZMM regs dump 2021-05-31 15:53:03 -04:00
cpu-internal.h i386: split off sysemu part of cpu.c 2021-05-10 15:41:52 -04:00
cpu-param.h tcg: Split out target/arch/cpu-param.h 2019-06-10 07:03:34 -07:00
cpu-qom.h qom: Remove module_obj_name parameter from OBJECT_DECLARE* macros 2020-09-18 14:12:32 -04:00
cpu-sysemu.c target/i386: spelling: occured=>occurred, mininum=>minimum 2021-09-16 11:51:23 +02:00
cpu.c i386: Add primary SGX CPUID and MSR defines 2021-09-30 14:50:20 +02:00
cpu.h i386: Add primary SGX CPUID and MSR defines 2021-09-30 14:50:20 +02:00
gdbstub.c target/i386: gdbstub: only write CR0/CR2/CR3/EFER for sysemu 2021-05-10 15:41:52 -04:00
helper.c i386: make cpu_load_efer sysemu-only 2021-05-10 15:41:52 -04:00
helper.h target/i386: fix exceptions for MOV to DR 2021-07-09 18:21:34 +02:00
host-cpu.c i386: do not call cpudef-only models functions for max, host, base 2021-07-23 15:47:13 +02:00
host-cpu.h accel-cpu: make cpu_realizefn return a bool 2021-05-10 15:41:50 -04:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
machine.c target/i386: Moved int_ctl into CPUX86State structure 2021-09-13 13:56:26 +02:00
meson.build i386: split off sysemu part of cpu.c 2021-05-10 15:41:52 -04:00
monitor.c target/i386/sev: add support to query the attestation report 2021-06-01 09:32:23 -04:00
ops_sse.h x86 tcg cpus: Fix Lesser GPL version number 2020-11-15 16:41:42 +01:00
ops_sse_header.h tcg: Combine dh_is_64bit and dh_is_signed to dh_typecode 2021-06-19 08:51:11 -07:00
sev-stub.c target/i386/sev: add support to query the attestation report 2021-06-01 09:32:23 -04:00
sev.c error: Use error_fatal to simplify obvious fatal errors (again) 2021-08-26 17:15:28 +02:00
sev_i386.h target/i386/sev: add support to query the attestation report 2021-06-01 09:32:23 -04:00
shift_helper_template.h x86 tcg cpus: Fix Lesser GPL version number 2020-11-15 16:41:42 +01:00
svm.h target/i386: Added vVMLOAD and vVMSAVE feature 2021-09-13 13:56:26 +02:00
trace-events * Update the references to some doc files (use *.rst instead of *.txt) 2021-06-02 17:08:11 +01:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
xsave_helper.c target/i386: Observe XSAVE state area offsets 2021-07-06 07:54:53 +02:00