mirror of
https://github.com/Motorhead1991/qemu.git
synced 2025-07-31 22:33:53 -06:00

Convert the following opcodes to decodetree: - MULT.G - multiply 32-bit signed integers - MULTU.G - multiply 32-bit unsigned integers - DMULT.G - multiply 64-bit signed integers - DMULTU.G - multiply 64-bit unsigned integers Now that all opcodes from the extension have been converted, we can remove completely gen_loongson_integer() and its 2 calls in decode_opc_special2_legacy() and decode_opc_special3_legacy(). Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20241026175349.84523-9-philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
28 lines
1,023 B
Text
28 lines
1,023 B
Text
# Loongson 64-bit Extension instructions
|
|
#
|
|
# Copyright (C) 2021 Philippe Mathieu-Daudé
|
|
#
|
|
# SPDX-License-Identifier: LGPL-2.1-or-later
|
|
#
|
|
# Reference:
|
|
# STLS2F01 User Manual
|
|
# Appendix A: new integer instructions
|
|
# (Document Number: UM0447)
|
|
#
|
|
|
|
&muldiv rs rt rd !extern
|
|
|
|
@rs_rt_rd ...... rs:5 rt:5 rd:5 ..... ...... &muldiv
|
|
|
|
MULTu_G 011100 ..... ..... ..... 00000 0100-0 @rs_rt_rd
|
|
DMULTu_G 011100 ..... ..... ..... 00000 0100-1 @rs_rt_rd
|
|
|
|
DIV_G 011100 ..... ..... ..... 00000 010100 @rs_rt_rd
|
|
DDIV_G 011100 ..... ..... ..... 00000 010101 @rs_rt_rd
|
|
DIVU_G 011100 ..... ..... ..... 00000 010110 @rs_rt_rd
|
|
DDIVU_G 011100 ..... ..... ..... 00000 010111 @rs_rt_rd
|
|
|
|
MOD_G 011100 ..... ..... ..... 00000 011100 @rs_rt_rd
|
|
DMOD_G 011100 ..... ..... ..... 00000 011101 @rs_rt_rd
|
|
MODU_G 011100 ..... ..... ..... 00000 011110 @rs_rt_rd
|
|
DMODU_G 011100 ..... ..... ..... 00000 011111 @rs_rt_rd
|