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Changes: * support IEEE 754-2008 in MIPS CPUs -----BEGIN PGP SIGNATURE----- iQEcBAABAgAGBQJXbU0yAAoJEFIRjjwLKdprgNwH+wRMihvG1CIyJ0v37OuNh0ab tuNIJ87Q7cm/Gn03otO6ziOAaQaPSunfLG3Lm+o1joob7WSWWieoqrCUBof8mCxC gSJGhykICWtfLW1Q0dtYdpOq5w3XCyh7+Ap4DWbyIBoFnlQ8OXTrjJhhk1jYqL/K PZECMl2MW+ZTYCAciRYlFcT99rL1Je/WVCWtpBF3B4zGmo3seCTNTg735GaqduKX wrj5UfQisZQ8tQWW2IUoXe2iSlj8rPYjjwZf/3+K7qx/v25bgGCHubgYw6IW6uWF 6EyT9XQPvZpydHCdaxl7BqstrX7l7F7P+ok3NvQMwmsMpKFZx1Ce5FSs67oyxG4= =/6k3 -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/lalrae/tags/mips-20160624' into staging MIPS patches 2016-06-24 Changes: * support IEEE 754-2008 in MIPS CPUs # gpg: Signature made Fri 24 Jun 2016 16:09:38 BST # gpg: using RSA key 0x52118E3C0B29DA6B # gpg: Good signature from "Leon Alrae <leon.alrae@imgtec.com>" # Primary key fingerprint: 8DD3 2F98 5495 9D66 35D4 4FC0 5211 8E3C 0B29 DA6B * remotes/lalrae/tags/mips-20160624: target-mips: Add FCR31's FS bit definition target-mips: Implement FCR31's R/W bitmask and related functionalities target-mips: Add nan2008 flavor of <CEIL|CVT|FLOOR|ROUND|TRUNC>.<L|W>.<S|D> target-mips: Add abs2008 flavor of <ABS|NEG>.<S|D> target-mips: Activate IEEE 754-2008 signaling NaN bit meaning for MSA linux-user: Update preprocessor constants for Mips-specific e_flags bits softfloat: Handle snan_bit_is_one == 0 in MIPS pickNaNMulAdd() softfloat: For Mips only, correct default NaN values softfloat: Clean code format in fpu/softfloat-specialize.h softfloat: Implement run-time-configurable meaning of signaling NaN bit Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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