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Alex Bennée 47e2c5510f target/arm: Document the architectural names of our GTIMERs 
As we are about to add more physical and virtual timers let's make it
clear what each timer does.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20250204125009.2281315-8-peter.maydell@linaro.org
[PMM: Add timer register name prefix to each comment]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
2025-03-07 10:08:21 +00:00
..
alpha target/alpha: Do not mix exception flags and FPCR bits 2025-03-06 15:46:18 +01:00
arm target/arm: Document the architectural names of our GTIMERs 2025-03-07 10:08:21 +00:00
avr target: Set disassemble_info::endian value for little-endian targets 2025-03-06 15:46:18 +01:00
hexagon target: Set disassemble_info::endian value for little-endian targets 2025-03-06 15:46:18 +01:00
hppa target: Set disassemble_info::endian value for big-endian targets 2025-03-06 15:46:18 +01:00
i386 target/i386: Mark WHPX APIC region as little-endian 2025-03-06 15:46:18 +01:00
loongarch target: Set disassemble_info::endian value for little-endian targets 2025-03-06 15:46:18 +01:00
m68k target: Set disassemble_info::endian value for big-endian targets 2025-03-06 15:46:18 +01:00
microblaze target/microblaze: Set disassemble_info::endian value in disas_set_info 2025-03-06 15:46:18 +01:00
mips target/mips: Set disassemble_info::endian value in disas_set_info() 2025-03-06 15:46:18 +01:00
openrisc target: Set disassemble_info::endian value for big-endian targets 2025-03-06 15:46:18 +01:00
ppc target/ppc: Set disassemble_info::endian value in disas_set_info() 2025-03-06 15:46:18 +01:00
riscv Generic CPUs / accelerators patch queue 2025-03-07 07:39:49 +08:00
rx target: Set disassemble_info::endian value for little-endian targets 2025-03-06 15:46:18 +01:00
s390x target: Set disassemble_info::endian value for big-endian targets 2025-03-06 15:46:18 +01:00
sh4 target/sh4: Set disassemble_info::endian value in disas_set_info() 2025-03-06 15:46:18 +01:00
sparc Generic CPUs / accelerators patch queue 2025-03-07 07:39:49 +08:00
tricore target/tricore: Ensure not being build on user emulation 2025-03-06 15:46:18 +01:00
xtensa target/xtensa: Finalize config in xtensa_register_core() 2025-03-06 15:46:18 +01:00
Kconfig target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00
meson.build target/cris: Remove the deprecated CRIS target 2024-09-13 20:11:13 +02:00