Bin Meng c696e1f2b3 hw/sd: Add Cadence SDHCI emulation ... Cadence SD/SDIO/eMMC Host Controller (SD4HC) is an SDHCI compatible controller. The SDHCI compatible registers start from offset 0x200, which are called Slot Register Set (SRS) in its datasheet. This creates a Cadence SDHCI model built on top of the existing generic SDHCI model. Cadence specific Host Register Set (HRS) is implemented to make guest software happy. Signed-off-by: Bin Meng <bin.meng@windriver.com> Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1598924352-89526-8-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2020-09-09 15:54:18 -07:00
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allwinner-sdhost.h	hw/sd/allwinner-sdhost: Use AddressSpace for DMA transfers	2020-08-28 10:02:45 +01:00
aspeed_sdhci.h	hw/sd: Configure number of slots exposed by the ASPEED SDHCI model	2020-01-30 16:02:02 +00:00
bcm2835_sdhost.h	bcm2835_sdhost: add bcm2835 sdhost controller	2017-02-28 12:08:19 +00:00
cadence_sdhci.h	hw/sd: Add Cadence SDHCI emulation	2020-09-09 15:54:18 -07:00
sd.h	hw/sd: Add sdbus_read_data() to read multiples bytes on the data line	2020-08-21 16:35:35 +02:00
sdcard_legacy.h	hw/sd: Rename read/write_data() as read/write_byte()	2020-08-21 16:35:35 +02:00
sdhci.h	sd: sdhci: Implement basic vendor specific register support	2020-06-16 10:32:29 +01:00