Michael Roth 417ece33fc spapr: improve ibm,architecture-vec-5 property handling ... ibm,architecture-vec-5 is supposed to encode all option vector 5 bits negotiated between platform/guest. Currently we hardcode this property in the boot-time device tree to advertise a single negotiated capability, "Form 1" NUMA Affinity, regardless of whether or not CAS has been invoked or that capability has actually been negotiated. Improve this by generating ibm,architecture-vec-5 based on the full set of option vector 5 capabilities negotiated via CAS. Signed-off-by: Michael Roth <mdroth@linux.vnet.ibm.com> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>		2016-10-28 09:38:26 +11:00
..
fdt.h	ppc: do not redefine CPUPPCState	2016-09-13 19:09:44 +02:00
mac_dbdma.h	Clean up decorations and whitespace around header guards	2016-07-12 16:20:46 +02:00
openpic.h	Clean up ill-advised or unusual header guards	2016-07-12 16:20:46 +02:00
pnv.h	ppc/pnv: add a ISA bus	2016-10-28 09:38:25 +11:00
pnv_core.h	ppc/pnv: add XSCOM handlers to PnvCore	2016-10-28 09:38:25 +11:00
pnv_lpc.h	ppc/pnv: add a LPC controller	2016-10-28 09:38:25 +11:00
pnv_xscom.h	ppc/pnv: add a LPC controller	2016-10-28 09:38:25 +11:00
ppc.h	ppc: parse cpu features once	2016-08-13 17:32:58 +10:00
ppc4xx.h	Remove unused function declarations	2016-09-15 15:32:22 +03:00
ppc_e500.h	intc/openpic: Build openpic only once	2013-07-09 21:33:02 +02:00
spapr.h	spapr: add option vector handling in CAS-generated resets	2016-10-28 09:38:26 +11:00
spapr_cpu_core.h	spapr: Introduce sPAPRCPUCoreClass	2016-09-23 12:39:06 +10:00
spapr_drc.h	Clean up ill-advised or unusual header guards	2016-07-12 16:20:46 +02:00
spapr_ovec.h	spapr: improve ibm,architecture-vec-5 property handling	2016-10-28 09:38:26 +11:00
spapr_rtas.h	tests: add RTAS command in the protocol	2016-09-23 10:29:40 +10:00
spapr_vio.h	pseries: Consolidate construction of /vdevice device tree node	2016-10-28 09:38:26 +11:00
xics.h	pseries: Move construction of /interrupt-controller fdt node	2016-10-28 09:38:26 +11:00