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Some assemblers will complain about attempts to access id_aa64zfr0_el1 and id_aa64smfr0_el1 by name if the test binary isn't built for the right processor type: /tmp/ccASXpLo.s:782: Error: selected processor does not support system register name 'id_aa64zfr0_el1' /tmp/ccASXpLo.s:829: Error: selected processor does not support system register name 'id_aa64smfr0_el1' However, these registers are in the ID space and are guaranteed to read-as-zero on older CPUs, so the access is both safe and sensible. Switch to using the S syntax, as we already do for ID_AA64ISAR2_EL1 and ID_AA64MMFR2_EL1. This allows us to drop the HAS_ARMV9_SME check and the makefile machinery to adjust the CFLAGS for this test, so we don't rely on having a sufficiently new compiler to be able to check these registers. This means we're actually testing the SME ID register: no released GCC yet recognizes -march=armv9-a+sme, so that was always skipped. It also avoids a future problem if we try to switch the "do we have SME support in the toolchain" check from "in the compiler" to "in the assembler" (at which point we would otherwise run into the above errors). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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| .. | ||
| gdbstub | ||
| system | ||
| bti-1.c | ||
| bti-2.c | ||
| bti-3.c | ||
| bti-crt.inc.c | ||
| dcpodp.c | ||
| dcpop.c | ||
| fcvt.ref | ||
| float_convd.ref | ||
| float_convs.ref | ||
| float_madds.ref | ||
| Makefile.softmmu-target | ||
| Makefile.target | ||
| mte-1.c | ||
| mte-2.c | ||
| mte-3.c | ||
| mte-4.c | ||
| mte-5.c | ||
| mte-6.c | ||
| mte-7.c | ||
| mte.h | ||
| pauth-1.c | ||
| pauth-2.c | ||
| pauth-4.c | ||
| pauth-5.c | ||
| pcalign-a64.c | ||
| semicall.h | ||
| sve-ioctls.c | ||
| sysregs.c | ||
| test-826.c | ||