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3cfcc329af
* New machine type: stm32vldiscovery * hw/intc/arm_gicv3_cpuif: Fix virtual irq number check in icv_[dir|eoir]_write * hw/gpio/pl061: Honour Luminary PL061 PUR and PDR registers * virt: Fix implementation of GPIO-based powerdown/shutdown mechanism * Correct the encoding of MDCCSR_EL0 and DBGDSCRint * hw/intc: Improve formatting of MEMTX_ERROR guest error message -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmDodKYZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3lLWD/9Ux5FW5GfJstzcLyMaEQCA KMw9I18YYDXKnynxn8vqBYPV49pN8Hc/4xFcCuhVhsNMBiLMvRpNrnzCad2hylVJ JrFkyHO78ibdTRqUCWtnToFnNR37gBei1sL8jlcaex789ifDX7KOpfERqvIa313o 5iMEDLOtbkqauyNXPpMxmS/imP13VLD0iuChQwYM6tYnVKja7uFScJRlU6/3ayRL sZC0Yc8WUuwICmYOxXTu/ANhJo3XsTWMLN9RMlpDQ7PV4nT4hJP2MPtdkEiUpNZo aon/w/Fe+PB1DW6MSfyYYrrJTh9SmpylB+kiEVnZtf5RQB7URpTo0Oyb1CF4xz97 YbUqgSwJtTAeYku6H/2tmXvD87I1w7i7Y6E16Gjo5WXqs7bULYEAR9/l0dt3FMSW MoKAlhnwB7eU/p2kd5NZEkPPx9W/Z0B/nFFctVEKkQpo2CrJoOJX08RsPpFrwGSE Sr8wnyvRQr7YzWwkG/q11Y+uS9SIszuEYZYqEGw1AVBgi78dMVPSFiXktRnV3ERI FQWb7xzQe2pTtTc0W4yrudMxk8bCJvGIa9SYTW4Z5CxO0EJkBOOPTwoIGoNEeLLC NYGDGeaDYy5aCdqRwBz+oguBhRgqIiQagSjPljnJ4vJPQhJvdFik2nuK5JYbKnPl 7G0GxqlDhMQs9tXTQ523Rw== =AkRd -----END PGP SIGNATURE----- Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210709' into staging target-arm queue: * New machine type: stm32vldiscovery * hw/intc/arm_gicv3_cpuif: Fix virtual irq number check in icv_[dir|eoir]_write * hw/gpio/pl061: Honour Luminary PL061 PUR and PDR registers * virt: Fix implementation of GPIO-based powerdown/shutdown mechanism * Correct the encoding of MDCCSR_EL0 and DBGDSCRint * hw/intc: Improve formatting of MEMTX_ERROR guest error message # gpg: Signature made Fri 09 Jul 2021 17:09:10 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * remotes/pmaydell/tags/pull-target-arm-20210709: hw/intc: Improve formatting of MEMTX_ERROR guest error message target/arm: Correct the encoding of MDCCSR_EL0 and DBGDSCRint hw/arm/stellaris: Expand comment about handling of OLED chipselect hw/gpio/pl061: Document a shortcoming in our implementation hw/gpio/pl061: Convert to 3-phase reset and assert GPIO lines correctly on reset hw/arm/virt: Make PL061 GPIO lines pulled low, not high hw/gpio/pl061: Make pullup/pulldown of outputs configurable hw/gpio/pl061: Honour Luminary PL061 PUR and PDR registers hw/gpio/pl061: Document the interface of this device hw/gpio/pl061: Add tracepoints for register read and write hw/gpio/pl061: Clean up read/write offset handling logic hw/gpio/pl061: Convert DPRINTF to tracepoints hw/intc/arm_gicv3_cpuif: Fix virtual irq number check in icv_[dir|eoir]_write tests/boot-serial-test: Add STM32VLDISCOVERY board testcase docs/system: arm: Add stm32 boards description stm32vldiscovery: Add the STM32VLDISCOVERY Machine stm32f100: Add the stm32f100 SoC Signed-off-by: Peter Maydell <peter.maydell@linaro.org> |
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