Richard Henderson 3c4ddec169 accel/tcg: Pass length argument to tlb_flush_range_locked() ... Rename tlb_flush_page_bits_locked() -> tlb_flush_range_locked(), and have callers pass a length argument (currently TARGET_PAGE_SIZE) via the TLBFlushPageBitsByMMUIdxData structure. Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210509151618.2331764-3-f4bug@amsat.org Message-Id: <20210508201640.1045808-1-richard.henderson@linaro.org> [PMD: Split from bigger patch] Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2021-05-25 16:01:43 +01:00
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hvf	hvf: Add hypervisor entitlement to output binaries	2021-01-29 10:47:28 +00:00
kvm	Do not include exec/address-spaces.h if it's not really necessary	2021-05-02 17:24:51 +02:00
qtest	accel: replace struct CpusAccel with AccelOpsClass	2021-02-05 10:24:15 -10:00
stubs	Do not include cpu.h if it's not really necessary	2021-05-02 17:24:51 +02:00
tcg	accel/tcg: Pass length argument to tlb_flush_range_locked()	2021-05-25 16:01:43 +01:00
xen	sysemu: Let VMChangeStateHandler take boolean 'running' argument	2021-03-09 23:13:57 +01:00
accel-common.c	accel: add init_accel_cpu for adapting accel behavior to CPU type	2021-05-10 15:41:52 -04:00
accel-softmmu.c	accel: replace struct CpusAccel with AccelOpsClass	2021-02-05 10:24:15 -10:00
accel-softmmu.h	accel: replace struct CpusAccel with AccelOpsClass	2021-02-05 10:24:15 -10:00
accel-user.c	accel: extend AccelState and AccelClass to user-mode	2021-02-05 10:24:15 -10:00
dummy-cpus.c	accel: move qtest CpusAccel functions to a common location	2020-10-24 07:23:19 +02:00
Kconfig	Add NVMM accelerator: configure and build logic	2021-05-04 14:15:34 +02:00
meson.build	accel: extend AccelState and AccelClass to user-mode	2021-02-05 10:24:15 -10:00