qemu/include/hw/ssi
Jamin Lin 3a6c0f0e9d aspeed/smc: support dma start length and 1 byte length unit
DMA length is from 1 byte to 32MB for AST2600 and AST10x0
and DMA length is from 4 bytes to 32MB for AST2500.

In other words, if "R_DMA_LEN" is 0, it should move at least 1 byte
data for AST2600 and AST10x0 and 4 bytes data for AST2500.
To support all ASPEED SOCs, adds dma_start_length parameter to store
the start length, add helper routines function to compute the dma length
and update DMA_LENGTH mask to "1FFFFFF" to support dma 1 byte
length unit for AST2600 and AST1030.
Currently, only supports dma length 4 bytes aligned.

Signed-off-by: Troy Lee <troy_lee@aspeedtech.com>
Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
2024-06-16 21:08:54 +02:00
..
aspeed_smc.h aspeed/smc: support dma start length and 1 byte length unit 2024-06-16 21:08:54 +02:00
bcm2835_spi.h hw/ssi: Implement BCM2835 SPI Controller 2024-02-02 13:51:59 +00:00
ibex_spi_host.h Do not include hw/hw.h if it is not necessary 2023-02-27 09:15:38 +01:00
imx_spi.h hw/ssi: imx_spi: Use a macro for number of chip selects supported 2021-02-02 17:00:54 +00:00
mss-spi.h Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
npcm7xx_fiu.h hw/ssi: NPCM7xx Flash Interface Unit device model 2020-09-14 14:24:59 +01:00
npcm_pspi.h hw/ssi: Add Nuvoton PSPI Module 2023-02-16 16:00:48 +00:00
pl022.h arm: Update infocenter.arm.com URLs 2021-02-11 11:50:14 +00:00
sifive_spi.h include: Include headers where needed 2023-01-08 01:54:22 -05:00
ssi.h hw/ssi: Introduce a ssi_get_cs() helper 2023-09-01 11:40:04 +02:00
stm32f2xx_spi.h Use OBJECT_DECLARE_SIMPLE_TYPE when possible 2020-09-18 14:12:32 -04:00
xilinx_spips.h hw/ssi/xilinx_spips: fix an out of bound access 2023-11-27 15:38:43 +00:00
xlnx-versal-ospi.h hw/misc, hw/ssi: Fix some URLs for AMD / Xilinx models 2023-11-27 15:38:43 +00:00