motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-08 10:13:56 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions
qemu/target/ppc
History
Nicholas Miehlbradt 395b5d5b45 target/ppc: Implement the DEXCR and HDEXCR 
Define the DEXCR and HDEXCR as special purpose registers.

Each register occupies two SPR indicies, one which can be read in an
unprivileged state and one which can be modified in the appropriate
priviliged state, however both indicies refer to the same underlying
value.

Note that the ISA uses the abbreviation UDEXCR in two different
contexts: the userspace DEXCR, the SPR index which can be read from
userspace (implemented in this patch), and the ultravisor DEXCR, the
equivalent register for the ultravisor state (not implemented).

Signed-off-by: Nicholas Miehlbradt <nicholas@linux.ibm.com>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20221220042330.2387944-2-nicholas@linux.ibm.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-12-21 14:17:55 -03:00
..
translate target/ppc: Use gvec to decode XVTSTDC[DS]P 2022-10-28 13:15:22 -03:00
arch_dump.c dump: Replace opaque DumpState pointer with a typed one 2022-10-06 19:30:43 +04:00
compat.c powerpc tcg: Fix Lesser GPL version number 2020-11-15 16:38:50 +01:00
cpu-models.c target/ppc: Fix MPC8555 and MPC8560 core type to e500v1 2022-07-06 10:30:01 -03:00
cpu-models.h target/ppc: Fix MPC8555 and MPC8560 core type to e500v1 2022-07-06 10:30:01 -03:00
cpu-param.h Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
cpu-qom.h target/ppc: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
cpu.c target/ppc: introduce ppc_maybe_interrupt 2022-10-28 13:15:22 -03:00
cpu.h target/ppc: Implement the DEXCR and HDEXCR 2022-12-21 14:17:55 -03:00
cpu_init.c target/ppc: Implement the DEXCR and HDEXCR 2022-12-21 14:17:55 -03:00
dfp_helper.c target/ppc: Set result to QNaN for DENBCD when VXCVI occurs 2022-09-20 10:54:06 -03:00
excp_helper.c target/ppc: Fix build warnings when building with 'disable-tcg' 2022-11-17 11:28:04 -03:00
fpu_helper.c target/ppc: Moved XSTSTDC[QDS]P to decodetree 2022-10-28 13:15:22 -03:00
gdbstub.c target/ppc: Remove msr_le macro 2022-05-05 15:36:17 -03:00
helper.h target/ppc: Increment PMC5 with inline insns 2022-10-28 13:15:23 -03:00
helper_regs.c target/ppc: Add new PMC HFLAGS 2022-10-28 13:15:23 -03:00
helper_regs.h target/ppc: Remove env->immu_idx and env->dmmu_idx 2021-05-04 11:41:25 +10:00
insn32.decode target/ppc: Moved XSTSTDC[QDS]P to decodetree 2022-10-28 13:15:22 -03:00
insn64.decode target/ppc: Implemented [pm]xvbf16ger2* 2022-05-26 17:11:33 -03:00
int_helper.c target/ppc: Move VABSDU[BHW] to decodetree and use gvec 2022-10-28 13:15:22 -03:00
internal.h target/ppc: move the p*_interrupt_powersave methods to excp_helper.c 2022-10-28 13:15:22 -03:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
kvm-stub.c Include qemu-common.h exactly where needed 2019-06-12 13:20:20 +02:00
kvm.c kvm: allow target-specific accelerator properties 2022-10-10 09:23:16 +02:00
kvm_ppc.h target/ppc/kvm: Add missing "cpu.h" and "exec/hwaddr.h" 2022-12-21 14:17:55 -03:00
machine.c target/ppc: Fix host PVR matching for KVM 2022-08-30 16:20:29 -03:00
mem_helper.c target/ppc: Remove msr_hv macro 2022-05-05 15:36:17 -03:00
meson.build target/ppc: make power8-pmu.c CONFIG_TCG only 2022-03-02 06:51:36 +01:00
misc_helper.c target/ppc: always use ppc_set_irq to set env->pending_interrupts 2022-10-28 13:15:22 -03:00
mmu-book3s-v3.c ppc: Check partition and process table alignment 2022-07-18 13:59:43 -03:00
mmu-book3s-v3.h target/ppc: Implement ISA 3.00 tlbie[l] 2022-07-18 13:59:43 -03:00
mmu-books.h target/ppc: introduce mmu-books.h 2021-07-09 10:38:19 +10:00
mmu-hash32.c target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
mmu-hash32.h target/ppc: Remove PowerPC 601 CPUs 2022-02-09 09:08:55 +01:00
mmu-hash64.c target/ppc: Implement slbiag 2022-07-18 13:59:43 -03:00
mmu-hash64.h target/ppc: fix Hash64 MMU update of PTE bit R 2021-11-29 21:00:08 +01:00
mmu-radix64.c target/ppc: Fix regression in Radix MMU 2022-10-29 06:34:52 -03:00
mmu-radix64.h target/ppc: Check effective address validity 2022-01-04 07:55:34 +01:00
mmu_common.c target/ppc/mmu_common: Fix table layout of "info tlb" HMP command 2022-12-21 14:17:55 -03:00
mmu_helper.c target/ppc: Implement ISA 3.00 tlbie[l] 2022-07-18 13:59:43 -03:00
monitor.c target/ppc: check tb_env != 0 before printing TBU/TBL/DECR 2022-07-18 13:59:43 -03:00
power8-pmu-regs.c.inc target/ppc: fix PMU Group A register read/write exceptions 2022-07-18 13:59:43 -03:00
power8-pmu.c target/ppc: Increment PMC5 with inline insns 2022-10-28 13:15:23 -03:00
power8-pmu.h target/ppc: Increment PMC5 with inline insns 2022-10-28 13:15:23 -03:00
spr_common.h target/ppc: Implement the DEXCR and HDEXCR 2022-12-21 14:17:55 -03:00
tcg-stub.c target/ppc: created tcg-stub.c file 2021-06-03 13:22:06 +10:00
timebase_helper.c target/ppc: fix exception error code in helper_{load, store}_dcr 2022-07-18 13:59:43 -03:00
trace-events target/ppc: Improve KVM hypercall trace 2022-04-20 18:00:30 -03:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
translate.c target/ppc: Implement the DEXCR and HDEXCR 2022-12-21 14:17:55 -03:00
user_only_helper.c target/ppc: Implement ppc_cpu_record_sigsegv 2021-11-02 07:00:52 -04:00