Alex Bennée 376e8d6cda arm/translate-a64: initial decode for simd_three_reg_same_fp16 ... This is the initial decode skeleton for the Advanced SIMD three same instruction group. The fprintf is purely to aid debugging as the additional instructions are added. It will be removed once the group is complete. Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20180227143852.11175-9-alex.bennee@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2018-03-01 11:13:59 +00:00
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arch_dump.c	target/arm: Add aa{32, 64}_vfp_{dreg, qreg} helpers	2018-01-25 11:45:29 +00:00
arm-powerctl.c	target-arm/powerctl: defer cpu reset work to CPU context	2017-02-24 10:32:46 +00:00
arm-powerctl.h	target-arm/powerctl: defer cpu reset work to CPU context	2017-02-24 10:32:46 +00:00
arm-semi.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
arm_ldst.h	Fix Thumb-1 BE32 execution and disassembly.	2017-02-07 18:29:59 +00:00
cpu-qom.h	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
cpu.c	target/*/cpu.h: remove softfloat.h	2018-02-21 10:20:24 +00:00
cpu.h	target/arm/cpu.h: add additional float_status flags	2018-03-01 11:13:59 +00:00
cpu64.c	target/arm: enable user-mode SHA-3, SM3, SM4 and SHA-512 instruction support	2018-02-09 10:40:29 +00:00
crypto_helper.c	target/arm: implement SM4 instructions	2018-02-09 10:40:28 +00:00
gdbstub.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
gdbstub64.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
helper-a64.c	arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV)	2018-03-01 11:13:59 +00:00
helper-a64.h	arm/translate-a64: implement half-precision F(MIN|MAX)(V|NMV)	2018-03-01 11:13:59 +00:00
helper.c	target/arm/helper: pass explicit fpst to set_rmode	2018-03-01 11:13:59 +00:00
helper.h	target/arm/helper: pass explicit fpst to set_rmode	2018-03-01 11:13:59 +00:00
internals.h	target/arm: Enforce access to ZCR_EL at translation	2018-02-15 18:29:48 +00:00
iwmmxt_helper.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
kvm-consts.h	arm: add trailing ; after MISMATCH_CHECK	2017-02-01 03:37:18 +02:00
kvm-stub.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
kvm.c	arm: postpone device listener unregister	2018-02-07 14:09:24 +01:00
kvm32.c	target/arm: Add aa{32, 64}_vfp_{dreg, qreg} helpers	2018-01-25 11:45:29 +00:00
kvm64.c	target/arm: Add aa{32, 64}_vfp_{dreg, qreg} helpers	2018-01-25 11:45:29 +00:00
kvm_arm.h	target/arm/kvm: gic: Prevent creating userspace GICv3 with KVM	2018-02-09 10:55:32 +00:00
machine.c	target/arm: Implement v8M MSPLIM and PSPLIM registers	2018-02-15 18:29:49 +00:00
Makefile.objs	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
monitor.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
neon_helper.c	target/*/cpu.h: remove softfloat.h	2018-02-21 10:20:24 +00:00
op_addsub.h	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
op_helper.c	-----BEGIN PGP SIGNATURE-----	2018-01-26 10:08:53 +00:00
psci.c	fix WFI/WFE length in syndrome register	2017-10-31 11:50:50 +00:00
trace-events	trace-events: fix code style: print 0x before hex numbers	2017-08-01 12:13:07 +01:00
translate-a64.c	arm/translate-a64: initial decode for simd_three_reg_same_fp16	2018-03-01 11:13:59 +00:00
translate.c	target/arm/helper: pass explicit fpst to set_rmode	2018-03-01 11:13:59 +00:00
translate.h	target/arm: Add SVE state to TB->FLAGS	2018-02-09 10:55:27 +00:00