Sebastian Macke 352367e8bb target-openrisc: Speed up move instruction ... The OpenRISC architecture does not have its own move register instruction. Instead it uses either "l.addi rd, r0, x" or "l.ori rd, rs, 0" or "l.or rd, rx, r0" The l.ori instruction is automatically optimized but not the l.addi instruction. This patch optimizes for this special case. Signed-off-by: Sebastian Macke <sebastian@macke.de> Reviewed-by: Jia Liu <proljc@gmail.com> Signed-off-by: Jia Liu <proljc@gmail.com>		2013-11-20 21:40:07 +08:00
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cpu.c	cpu: Drop cpu_model_str from CPU_COMMON	2013-10-07 11:48:47 +02:00
cpu.h	cpu: Introduce CPUClass::gdb_{read,write}_register()	2013-07-27 00:04:17 +02:00
exception.c	target-or32: Add exception support	2012-07-27 21:12:58 +00:00
exception.h	target-or32: Add exception support	2012-07-27 21:12:58 +00:00
exception_helper.c	target-openrisc: Clean up triple QOM casts	2013-01-27 14:34:26 +01:00
fpu_helper.c	target-openrisc: Clean up triple QOM casts	2013-01-27 14:34:26 +01:00
gdbstub.c	cpu: Introduce CPUClass::gdb_{read,write}_register()	2013-07-27 00:04:17 +02:00
helper.h	exec: move include files to include/exec/	2012-12-19 08:31:31 +01:00
int_helper.c	target-openrisc: Clean up triple QOM casts	2013-01-27 14:34:26 +01:00
interrupt.c	cpu: Replace do_interrupt() by CPUClass::do_interrupt method	2013-03-12 10:35:55 +01:00
interrupt_helper.c	cpu: Move halted and interrupt_request fields to CPUState	2013-03-12 10:35:55 +01:00
machine.c	target-openrisc: Register VMStateDescription for OpenRISCCPU	2013-06-28 13:25:12 +02:00
Makefile.objs	cpu: Introduce CPUClass::gdb_{read,write}_register()	2013-07-27 00:04:17 +02:00
mmu.c	target-openrisc: Removes a non-conforming behavior for the first page of the memory	2013-10-03 16:24:44 +08:00
mmu_helper.c	exec: move include files to include/exec/	2012-12-19 08:31:31 +01:00
sys_helper.c	cpu: Move halted and interrupt_request fields to CPUState	2013-03-12 10:35:55 +01:00
translate.c	target-openrisc: Speed up move instruction	2013-11-20 21:40:07 +08:00