Philippe Mathieu-Daudé 32cad1ffb8 include: Rename sysemu/ -> system/ ... Headers in include/sysemu/ are not only related to system *emulation*, they are also used by virtualization. Rename as system/ which is clearer. Files renamed manually then mechanical change using sed tool. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Tested-by: Lei Yang <leiyang@redhat.com> Message-Id: <20241203172445.28576-1-philmd@linaro.org>		2024-12-20 17:44:56 +01:00
..
boot.h	target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI	2024-10-30 11:22:07 +10:00
boot_opensbi.h	target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI	2024-10-30 11:22:07 +10:00
iommu.h	hw/riscv: add RISC-V IOMMU base emulation	2024-10-31 13:51:24 +10:00
microchip_pfsoc.h	include: Include headers where needed	2023-01-08 01:54:22 -05:00
numa.h	include: Rename sysemu/ -> system/	2024-12-20 17:44:56 +01:00
opentitan.h	hw/riscv/opentitan: Correct OpenTitanState parent type/size	2023-06-13 17:19:42 +10:00
riscv_hart.h	riscv: spelling fixes	2023-09-08 13:08:52 +03:00
shakti_c.h	hw/intc: sifive_plic: Change "priority-base" to start from interrupt source 0	2023-01-06 10:42:55 +10:00
sifive_cpu.h	riscv: Add a sifive_cpu.h to include both E and U cpu type defines	2019-09-17 08:42:46 -07:00
sifive_e.h	hw/riscv: sifive_e: Support the watchdog timer of HiFive 1 rev b.	2023-07-10 22:29:15 +10:00
sifive_u.h	hw/riscv: Move the dtb load bits outside of create_fdt()	2023-03-01 17:19:14 -08:00
spike.h	hw/riscv/spike: use 'fdt' from MachineState	2023-01-20 10:14:13 +10:00
virt.h	hw/riscv/virt.c: add address-cells in create_fdt_one_aplic()	2024-06-26 22:32:29 +10:00