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Bernhard Beschow 2479abef09 target/ppc/mmu_common: Fix table layout of "info tlb" HMP command 
Starting with the URWX columns the columns didn't line up.
Before:

  QEMU 7.2.50 monitor - type 'help' for more information
  (qemu) info tlb

  TLB0:
  Effective          Physical           Size TID   TS SRWX URWX WIMGE U0123
  0x0000000000a80000 0x000000000105d000   4K 117   0  SR--UR-- --M-- U----
  0x0000000000100000 0x000000000114e000   4K 117   0  SR--UR-- --M-- U----
  <snip

  TLB1:
  Effective          Physical           Size TID   TS SRWX URWX WIMGE U0123
  0x00000000c0000000 0x0000000000000000  16M 0     0  SR-XU--- --M-- U----
  0x00000000c1000000 0x0000000001000000  16M 0     0  SRW-U--- --M-- U----
  <snip>
  (qemu)

After:

  QEMU 7.2.50 monitor - type 'help' for more information
  (qemu) info tlb

  TLB0:
  Effective          Physical           Size TID   TS SRWX URWX WIMGE U0123
  0x00000000b7a00000 0x000000000fcf5000   4K 18    0  SR-- UR-- --M-- U----
  0x0000000000800000 0x000000000fd73000   4K 18    0  SR-- UR-X --M-- U----
  <snip>

  TLB1:
  Effective          Physical           Size TID   TS SRWX URWX WIMGE U0123
  0x00000000c0000000 0x0000000000000000  16M 0     0  SR-X U--- --M-- U----
  0x00000000c1000000 0x0000000001000000  16M 0     0  SRW- U--- --M-- U----
  <snip>
  (qemu)

Signed-off-by: Bernhard Beschow <shentey@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20221216145709.271940-3-shentey@gmail.com>
Signed-off-by: Daniel Henrique Barboza <danielhb413@gmail.com>
2022-12-21 14:17:55 -03:00
..
alpha accel/tcg: Remove will_exit argument from cpu_restore_state 2022-11-01 08:31:41 +11:00
arm target/arm: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
avr target/avr: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
cris target/cris: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
hexagon 1) 2022-12-18 17:02:11 +00:00
hppa target/hppa: Fix fid instruction emulation 2022-12-19 23:14:06 +01:00
i386 target/i386: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
loongarch target/loongarch: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
m68k target/m68k: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
microblaze target/microblaze: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
mips target/mips: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
nios2 target/nios2: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
openrisc target/openrisc: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
ppc target/ppc/mmu_common: Fix table layout of "info tlb" HMP command 2022-12-21 14:17:55 -03:00
riscv target/riscv: Convert to 3-phase reset 2022-12-16 15:58:15 +00:00
rx target/rx: Convert to 3-phase reset 2022-12-16 15:58:16 +00:00
s390x target/s390x: The MVCP and MVCS instructions are not privileged 2022-12-15 15:02:34 +01:00
sh4 target/sh4: Mask restore of env->flags from tb->flags 2022-12-18 09:36:07 -08:00
sparc target/sparc: Convert to 3-phase reset 2022-12-16 15:58:16 +00:00
tricore target/tricore: Fix gdbstub write to address registers 2022-12-18 09:39:17 -08:00
xtensa target/xtensa: Convert to 3-phase reset 2022-12-16 15:58:16 +00:00
Kconfig hw/loongarch: Add support loongson3 virt machine type. 2022-06-06 18:09:03 +00:00
meson.build target/loongarch: Add target build suport 2022-06-06 18:09:03 +00:00