qemu/hw/riscv
Daniel Henrique Barboza 3139929da4 hw/riscv/spike: use 'fdt' from MachineState
The MachineState object provides a 'fdt' pointer that is already being
used by other RISC-V machines, and it's also used by the 'dumpdtb' QMP
command.

Remove the 'fdt' pointer from SpikeState and use MachineState::fdt
instead.

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Bin Meng <bmeng@tinylab.org>
Message-Id: <20230102115241.25733-3-dbarboza@ventanamicro.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
2023-01-20 10:14:13 +10:00
..
boot.c hw/riscv/boot.c: Introduce riscv_find_firmware() 2023-01-20 10:14:13 +10:00
Kconfig hw/riscv: Sort machines Kconfig options in alphabetical order 2023-01-06 10:42:55 +10:00
meson.build hw/riscv/Kconfig: Restrict NUMA to Virt & Spike machines 2021-07-20 15:32:49 +02:00
microchip_pfsoc.c hw/{misc, riscv}: pfsoc: add system controller as unimplemented 2023-01-06 10:42:55 +10:00
numa.c hw: Do not include qemu/log.h if it is not necessary 2021-05-02 17:24:50 +02:00
opentitan.c hw/riscv: opentitan: Drop "hartid-base" and "priority-base" initialization 2023-01-06 10:42:55 +10:00
riscv_hart.c hw/riscv: hart: Add a new 'resetvec' property 2020-09-09 15:54:18 -07:00
shakti_c.c hw/riscv: remove 'fdt' param from riscv_setup_rom_reset_vec() 2022-09-07 09:18:33 +02:00
sifive_e.c hw/riscv: Make CPU config error handling generous (sifive_e/u/opentitan) 2022-05-24 10:38:50 +10:00
sifive_u.c hw/riscv/boot.c: introduce riscv_default_firmware_name() 2023-01-20 10:14:13 +10:00
spike.c hw/riscv/spike: use 'fdt' from MachineState 2023-01-20 10:14:13 +10:00
virt.c hw/riscv/boot.c: introduce riscv_default_firmware_name() 2023-01-20 10:14:13 +10:00