Peter Maydell 2d981da77d target-arm: Use standard FPSCR for Neon half-precision operations ... The Neon half-precision conversion operations (VCVT.F16.F32 and VCVT.F32.F16) use ARM standard floating-point arithmetic, unlike the VFP versions (VCVTB and VCVTT). Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>		2011-02-10 18:28:30 +01:00
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cpu.h	target-arm: Add CPU feature flag for v7MP	2011-02-04 21:30:14 +01:00
exec.h	move cpu_pc_from_tb to target-*/exec.h	2010-07-03 09:48:12 +03:00
helper.c	target-arm: Use standard FPSCR for Neon half-precision operations	2011-02-10 18:28:30 +01:00
helpers.h	target-arm: Use standard FPSCR for Neon half-precision operations	2011-02-10 18:28:30 +01:00
iwmmxt_helper.c	Update to a hopefully more future proof FSF address	2009-07-16 20:47:01 +00:00
machine.c	Save/restore ARMv6 MMU state	2009-07-31 13:19:39 +01:00
neon_helper.c	target-arm: Fix 32 bit signed saturating narrow	2011-02-09 19:37:48 +01:00
op_addsub.h	target-arm: fix addsub/subadd implementation	2010-07-01 23:45:29 +02:00
op_helper.c	Set the right overflow bit for neon 32 and 64 bit saturating add/sub.	2011-02-04 20:57:41 +01:00
translate.c	target-arm: Use standard FPSCR for Neon half-precision operations	2011-02-10 18:28:30 +01:00