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https://github.com/Motorhead1991/qemu.git
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6482e9d2a4
Make deposit "unconditional" in the sense that the opcode is always present. Rely instead on TCG_TARGET_deposit_valid, now always defined. Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
101 lines
3.4 KiB
C
101 lines
3.4 KiB
C
/* SPDX-License-Identifier: MIT */
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/*
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* Define target-specific opcode support
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* Copyright (c) 2024 Linaro, Ltd.
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*/
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#ifndef TCG_HAS_H
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#define TCG_HAS_H
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#include "tcg-target-has.h"
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#if TCG_TARGET_REG_BITS == 32
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/* Turn some undef macros into false macros. */
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#define TCG_TARGET_HAS_extr_i64_i32 0
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#define TCG_TARGET_HAS_div_i64 0
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#define TCG_TARGET_HAS_rem_i64 0
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#define TCG_TARGET_HAS_div2_i64 0
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#define TCG_TARGET_HAS_rot_i64 0
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#define TCG_TARGET_HAS_ext8s_i64 0
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#define TCG_TARGET_HAS_ext16s_i64 0
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#define TCG_TARGET_HAS_ext32s_i64 0
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#define TCG_TARGET_HAS_ext8u_i64 0
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#define TCG_TARGET_HAS_ext16u_i64 0
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#define TCG_TARGET_HAS_ext32u_i64 0
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#define TCG_TARGET_HAS_bswap16_i64 0
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#define TCG_TARGET_HAS_bswap32_i64 0
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#define TCG_TARGET_HAS_bswap64_i64 0
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#define TCG_TARGET_HAS_not_i64 0
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#define TCG_TARGET_HAS_andc_i64 0
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#define TCG_TARGET_HAS_orc_i64 0
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#define TCG_TARGET_HAS_eqv_i64 0
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#define TCG_TARGET_HAS_nand_i64 0
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#define TCG_TARGET_HAS_nor_i64 0
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#define TCG_TARGET_HAS_clz_i64 0
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#define TCG_TARGET_HAS_ctz_i64 0
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#define TCG_TARGET_HAS_ctpop_i64 0
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#define TCG_TARGET_HAS_extract2_i64 0
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#define TCG_TARGET_HAS_negsetcond_i64 0
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#define TCG_TARGET_HAS_add2_i64 0
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#define TCG_TARGET_HAS_sub2_i64 0
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#define TCG_TARGET_HAS_mulu2_i64 0
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#define TCG_TARGET_HAS_muls2_i64 0
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#define TCG_TARGET_HAS_muluh_i64 0
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#define TCG_TARGET_HAS_mulsh_i64 0
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/* Turn some undef macros into true macros. */
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#define TCG_TARGET_HAS_add2_i32 1
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#define TCG_TARGET_HAS_sub2_i32 1
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#endif
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/* Only one of DIV or DIV2 should be defined. */
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#if defined(TCG_TARGET_HAS_div_i32)
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#define TCG_TARGET_HAS_div2_i32 0
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#elif defined(TCG_TARGET_HAS_div2_i32)
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#define TCG_TARGET_HAS_div_i32 0
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#define TCG_TARGET_HAS_rem_i32 0
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#endif
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#if defined(TCG_TARGET_HAS_div_i64)
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#define TCG_TARGET_HAS_div2_i64 0
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#elif defined(TCG_TARGET_HAS_div2_i64)
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#define TCG_TARGET_HAS_div_i64 0
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#define TCG_TARGET_HAS_rem_i64 0
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#endif
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#if !defined(TCG_TARGET_HAS_v64) \
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&& !defined(TCG_TARGET_HAS_v128) \
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&& !defined(TCG_TARGET_HAS_v256)
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#define TCG_TARGET_MAYBE_vec 0
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#define TCG_TARGET_HAS_abs_vec 0
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#define TCG_TARGET_HAS_neg_vec 0
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#define TCG_TARGET_HAS_not_vec 0
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#define TCG_TARGET_HAS_andc_vec 0
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#define TCG_TARGET_HAS_orc_vec 0
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#define TCG_TARGET_HAS_nand_vec 0
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#define TCG_TARGET_HAS_nor_vec 0
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#define TCG_TARGET_HAS_eqv_vec 0
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#define TCG_TARGET_HAS_roti_vec 0
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#define TCG_TARGET_HAS_rots_vec 0
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#define TCG_TARGET_HAS_rotv_vec 0
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#define TCG_TARGET_HAS_shi_vec 0
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#define TCG_TARGET_HAS_shs_vec 0
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#define TCG_TARGET_HAS_shv_vec 0
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#define TCG_TARGET_HAS_mul_vec 0
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#define TCG_TARGET_HAS_sat_vec 0
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#define TCG_TARGET_HAS_minmax_vec 0
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#define TCG_TARGET_HAS_bitsel_vec 0
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#define TCG_TARGET_HAS_cmpsel_vec 0
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#define TCG_TARGET_HAS_tst_vec 0
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#else
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#define TCG_TARGET_MAYBE_vec 1
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#endif
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#ifndef TCG_TARGET_HAS_v64
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#define TCG_TARGET_HAS_v64 0
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#endif
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#ifndef TCG_TARGET_HAS_v128
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#define TCG_TARGET_HAS_v128 0
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#endif
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#ifndef TCG_TARGET_HAS_v256
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#define TCG_TARGET_HAS_v256 0
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#endif
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#endif
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