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dd29117174
When dump memory content with gva address, software page table walker is necessary to get responding gpa address. Here page table walker is added for debugger usage. Signed-off-by: Miao Hao <haomiao23s@ict.ac.cn> Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn>
80 lines
2.9 KiB
C
80 lines
2.9 KiB
C
/* SPDX-License-Identifier: GPL-2.0-or-later */
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/*
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* QEMU LoongArch CPU -- internal functions and types
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*
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* Copyright (c) 2021 Loongson Technology Corporation Limited
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*/
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#ifndef LOONGARCH_INTERNALS_H
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#define LOONGARCH_INTERNALS_H
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#define FCMP_LT 0b0001 /* fp0 < fp1 */
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#define FCMP_EQ 0b0010 /* fp0 = fp1 */
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#define FCMP_UN 0b0100 /* unordered */
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#define FCMP_GT 0b1000 /* fp0 > fp1 */
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#define TARGET_PHYS_MASK MAKE_64BIT_MASK(0, TARGET_PHYS_ADDR_SPACE_BITS)
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#define TARGET_VIRT_MASK MAKE_64BIT_MASK(0, TARGET_VIRT_ADDR_SPACE_BITS)
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void loongarch_translate_init(void);
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void loongarch_translate_code(CPUState *cs, TranslationBlock *tb,
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int *max_insns, vaddr pc, void *host_pc);
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void G_NORETURN do_raise_exception(CPULoongArchState *env,
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uint32_t exception,
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uintptr_t pc);
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const char *loongarch_exception_name(int32_t exception);
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#ifdef CONFIG_TCG
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int ieee_ex_to_loongarch(int xcpt);
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void restore_fp_status(CPULoongArchState *env);
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#endif
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#ifndef CONFIG_USER_ONLY
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enum {
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TLBRET_MATCH = 0,
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TLBRET_BADADDR = 1,
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TLBRET_NOMATCH = 2,
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TLBRET_INVALID = 3,
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TLBRET_DIRTY = 4,
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TLBRET_RI = 5,
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TLBRET_XI = 6,
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TLBRET_PE = 7,
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};
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extern const VMStateDescription vmstate_loongarch_cpu;
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void loongarch_cpu_set_irq(void *opaque, int irq, int level);
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void loongarch_constant_timer_cb(void *opaque);
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uint64_t cpu_loongarch_get_constant_timer_counter(LoongArchCPU *cpu);
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uint64_t cpu_loongarch_get_constant_timer_ticks(LoongArchCPU *cpu);
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void cpu_loongarch_store_constant_timer_config(LoongArchCPU *cpu,
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uint64_t value);
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bool loongarch_tlb_search(CPULoongArchState *env, target_ulong vaddr,
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int *index);
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int get_physical_address(CPULoongArchState *env, hwaddr *physical,
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int *prot, target_ulong address,
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MMUAccessType access_type, int mmu_idx, int is_debug);
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void get_dir_base_width(CPULoongArchState *env, uint64_t *dir_base,
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uint64_t *dir_width, target_ulong level);
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hwaddr loongarch_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
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#ifdef CONFIG_TCG
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bool loongarch_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
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MMUAccessType access_type, int mmu_idx,
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bool probe, uintptr_t retaddr);
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#endif
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#endif /* !CONFIG_USER_ONLY */
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uint64_t read_fcc(CPULoongArchState *env);
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void write_fcc(CPULoongArchState *env, uint64_t val);
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int loongarch_cpu_gdb_read_register(CPUState *cs, GByteArray *mem_buf, int n);
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int loongarch_cpu_gdb_write_register(CPUState *cs, uint8_t *mem_buf, int n);
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void loongarch_cpu_register_gdb_regs_for_features(CPUState *cs);
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int loongarch_cpu_write_elf64_note(WriteCoreDumpFunction f, CPUState *cpu,
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int cpuid, DumpState *s);
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#endif
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