Max Filippov 2af3da9183 target-xtensa: add special and user registers ... Special Registers hold the majority of the state added to the processor by the options. See ISA, 5.3 for details. User Registers hold state added in support of designer's TIE and in some cases of options that Tensilica provides. See ISA, 5.4 for details. Only registers mapped in sregnames or uregnames are considered valid. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Blue Swirl <blauwirbel@gmail.com>		2011-09-10 16:57:37 +00:00
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cpu.h	target-xtensa: add special and user registers	2011-09-10 16:57:37 +00:00
helper.c	target-xtensa: implement disas_xtensa_insn	2011-09-10 16:57:36 +00:00
helpers.h	target-xtensa: implement disas_xtensa_insn	2011-09-10 16:57:36 +00:00
machine.c	target-xtensa: add target stubs	2011-09-10 16:57:36 +00:00
op_helper.c	target-xtensa: implement disas_xtensa_insn	2011-09-10 16:57:36 +00:00
translate.c	target-xtensa: add special and user registers	2011-09-10 16:57:37 +00:00