Peter Maydell 29dc49f031 target-arm queue: ... * hw/arm/virt: Add properties to allow more granular configuration of use of highmem space  * target/arm: Add Cortex-A55 CPU  * hw/intc/arm_gicv3: Fix GICD_TYPER ITLinesNumber advertisement  * Implement FEAT_EVT  * Some 3-phase-reset conversions for Arm GIC, SMMU  * hw/arm/boot: set initrd with #address-cells type in fdt  * hw/misc: Move some arm-related files from specific_ss into softmmu_ss  * Restrict arm_cpu_exec_interrupt() to TCG accelerator -----BEGIN PGP SIGNATURE----- iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmObW5wZHHBldGVyLm1h eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3nWUD/4xKR9eAX9NTgASnvW3MffZ GMkCW8TVFJdJy7rNq7TvPfdBEieVwrAGUmsTpkqN41/CHIIwIfssLzq6k1iliCOa /BrqA6p/vff+gRfV0rEgy7i/VsHmWzD5TU6qR/Jm899HA1ZsHGUFHzjs5p+V9Uzz r3awYTYsYbmuUgeoCaAQhbsyLCRmSi7gVbxeEc6UZst36xZEVwG8tPTwnhZUk55E KkZkSPvGiQ+1VKeGnL2yvjGS8blZnJL55oJ7wI7yAypCxy6gudB1HGegaNPnNcxf 9lwph5sYaXbc0vyyAK3EJ+KUaJV9ZDU/ipjt3o88egYSYlB40IRVH1d+3ckZKSdG EBlD2vIx4vHjaIUXorB9U6BuktBsPtDmJ6jEsTT+cbb8roGDMB/opDZMNQB4WMIU kVEGZg7o3qkNDruAQOjakz8kOLq1J/ZKXBkLKWAsTTzdfMlnOMxAbFuFMxut7a+q JULMPjX9dBJDhsjE841QkAbYst1phDg8hCc00JB6Rbrl39jr4GZWfvaLKnci17ts nskPa/ElXvQj5WLhNZmn6vAco8mtGeDHzSNPnAoCCcDHd+hwfXkXKkweWZzzAr3f /PprDZy4hrksYqyYa9YMMQjHOlXQrJs5GntptnZwQQR2hhuQcCnBSNKxF+G6tk+K 7Q1FjpE2d8NvL8Ar+WaX8w== =YAjF -----END PGP SIGNATURE----- Merge tag 'pull-target-arm-20221215-1' of https://git.linaro.org/people/pmaydell/qemu-arm into staging target-arm queue:  * hw/arm/virt: Add properties to allow more granular configuration of use of highmem space  * target/arm: Add Cortex-A55 CPU  * hw/intc/arm_gicv3: Fix GICD_TYPER ITLinesNumber advertisement  * Implement FEAT_EVT  * Some 3-phase-reset conversions for Arm GIC, SMMU  * hw/arm/boot: set initrd with #address-cells type in fdt  * hw/misc: Move some arm-related files from specific_ss into softmmu_ss  * Restrict arm_cpu_exec_interrupt() to TCG accelerator # gpg: Signature made Thu 15 Dec 2022 17:38:36 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE * tag 'pull-target-arm-20221215-1' of https://git.linaro.org/people/pmaydell/qemu-arm: (28 commits) target/arm: Restrict arm_cpu_exec_interrupt() to TCG accelerator hw/misc: Move some arm-related files from specific_ss into softmmu_ss hw/arm/boot: set initrd with #address-cells type in fdt hw/intc: Convert TYPE_KVM_ARM_ITS to 3-phase reset hw/intc: Convert TYPE_ARM_GICV3_ITS to 3-phase reset hw/intc: Convert TYPE_ARM_GICV3_ITS_COMMON to 3-phase reset hw/intc: Convert TYPE_KVM_ARM_GICV3 to 3-phase reset hw/intc: Convert TYPE_ARM_GICV3_COMMON to 3-phase reset hw/intc: Convert TYPE_ARM_GIC_KVM to 3-phase reset hw/intc: Convert TYPE_ARM_GIC_COMMON to 3-phase reset hw/arm: Convert TYPE_ARM_SMMUV3 to 3-phase reset hw/arm: Convert TYPE_ARM_SMMU to 3-phase reset target/arm: Report FEAT_EVT for TCG '-cpu max' target/arm: Implement HCR_EL2.TID4 traps target/arm: Implement HCR_EL2.TICAB,TOCU traps target/arm: Implement HCR_EL2.TTLBOS traps target/arm: Implement HCR_EL2.TTLBIS traps target/arm: Allow relevant HCR bits to be written for FEAT_EVT hw/intc/arm_gicv3: Fix GICD_TYPER ITLinesNumber advertisement target/arm: Add Cortex-A55 CPU ... Signed-off-by: Peter Maydell <peter.maydell@linaro.org>		2022-12-15 17:40:57 +00:00
..
authz	Prefer 'on' | 'off' over 'yes' | 'no' for bool options	2021-01-29 17:07:53 +00:00
block	block: Make bdrv_child_get_parent_aio_context I/O	2022-11-10 14:58:34 +01:00
chardev	chardev: src buffer const for write functions	2022-09-29 14:38:05 +04:00
crypto	crypto: Support export akcipher to pkcs8	2022-11-02 06:56:32 -04:00
disas	target/loongarch: Add disassembler	2022-06-06 18:09:03 +00:00
exec	migration: Use non-atomic ops for clear log bitmap	2022-11-21 11:58:10 +01:00
fpu	fpu: Add rebias bool, value and operation	2022-08-31 14:08:05 -03:00
hw	target-arm queue:	2022-12-15 17:40:57 +00:00
io	io: Tidy up fat-fingered parameter name	2022-12-14 16:19:35 +01:00
libdecnumber	Replace config-time define HOST_WORDS_BIGENDIAN	2022-04-06 10:50:37 +02:00
migration	migration: Remove load_state_old and minimum_version_id_old	2022-03-02 18:20:45 +00:00
monitor	qapi misc: Elide redundant has_FOO in generated C	2022-12-14 20:04:47 +01:00
net	Add G_GNUC_PRINTF to function qemu_set_info_str and fix related issues	2022-11-27 13:36:17 -05:00
qapi	qerror: QERR_PERMISSION_DENIED is no longer used, drop	2022-10-27 07:57:18 +02:00
qemu	qemu-config: Make config_parse_qdict() return bool	2022-12-14 16:19:35 +01:00
qom	qom/object: Remove circular include dependency	2022-06-28 10:53:32 +02:00
scsi	scsi-disk: add SCSI_DISK_QUIRK_MODE_PAGE_VENDOR_SPECIFIC_APPLE quirk for Macintosh	2022-07-13 16:58:58 +02:00
semihosting	semihosting: Allow optional use of semihosting from userspace	2022-09-13 17:18:21 +01:00
standard-headers	m68k: rework BI_VIRT_RNG_SEED as BI_RNG_SEED	2022-10-21 20:46:10 +02:00
sysemu	cryptodev: Add a lkcf-backend for cryptodev	2022-11-02 06:56:32 -04:00
tcg	accel/tcg: Introduce tb_pc and log_pc	2022-10-04 12:13:12 -07:00
ui	ui/console: Get tab completion working again in the SDL monitor vc	2022-09-23 13:42:09 +02:00
user	misc: fix commonly doubled up words	2022-08-01 11:58:02 +02:00
elf.h	include/elf.h: add s390x note types	2022-10-26 12:54:59 +04:00
glib-compat.h	compiler.h: replace QEMU_NORETURN with G_NORETURN	2022-04-21 17:03:51 +04:00
qemu-io.h	Include qemu-common.h exactly where needed	2019-06-12 13:20:20 +02:00
qemu-main.h	ui/cocoa: Run qemu_init in the main thread	2022-09-23 14:36:33 +02:00