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The timer controller include 8 sets of 32-bit decrement counters, based on either PCLK or 1MHZ clock and the design of timer controller between AST2600 and AST2700 are almost the same. TIMER0 – TIMER7 has their own individual control and interrupt status register. In other words, users are able to set timer control in register TMC10 with different TIMER base address and clear timer control and interrupt status in register TMC14 with different TIMER base address. Introduce new "aspeed_2700_timer_read" and "aspeed_2700_timer_write" callback functions and a new ast2700 class to support AST2700. The base address of TIMER0 to TIMER7 as following. Base Address of Timer 0 = 0x12C1_0000 Base Address of Timer 1 = 0x12C1_0040 Base Address of Timer 2 = 0x12C1_0080 Base Address of Timer 3 = 0x12C1_00C0 Base Address of Timer 4 = 0x12C1_0100 Base Address of Timer 5 = 0x12C1_0140 Base Address of Timer 6 = 0x12C1_0180 Base Address of Timer 7 = 0x12C1_01C0 The register address space of each TIMER is "0x40" , and uses the following formula to get the index and register of each TIMER. timer_index = offset >> 6; timer_offset = offset & 0x3f; The TMC010 is a counter control set and interrupt status register. Write "1" to TMC10[3:0] will set the specific bits to "1". Introduce a new "aspeed_2700_timer_set_ctrl" function to handle this register behavior. The TMC014 is a counter control clear and interrupt status register, to clear the specific bits to "0", it should write "1" to TMC14[3:0] on the same bit position. Introduce a new "aspeed_2700_timer_clear_ctrl" function to handle this register behavior. TMC014 does not support read operation. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Acked-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/r/20250113064455.1660564-3-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com> |
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| .. | ||
| a9gtimer.h | ||
| allwinner-a10-pit.h | ||
| arm_mptimer.h | ||
| armv7m_systick.h | ||
| aspeed_timer.h | ||
| avr_timer16.h | ||
| bcm2835_systmr.h | ||
| cadence_ttc.h | ||
| cmsdk-apb-dualtimer.h | ||
| cmsdk-apb-timer.h | ||
| digic-timer.h | ||
| grlib_gptimer.h | ||
| hpet.h | ||
| i8254.h | ||
| i8254_internal.h | ||
| ibex_timer.h | ||
| imx_epit.h | ||
| imx_gpt.h | ||
| mips_gictimer.h | ||
| mss-timer.h | ||
| npcm7xx_timer.h | ||
| nrf51_timer.h | ||
| renesas_cmt.h | ||
| renesas_tmr.h | ||
| sifive_pwm.h | ||
| sse-counter.h | ||
| sse-timer.h | ||
| stellaris-gptm.h | ||
| stm32f2xx_timer.h | ||
| tmu012.h | ||