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284a66a8f6
The current MCHP_PFSOC_MMUART_REG_SIZE definition represent the
size occupied by all the registers. However all registers are
32-bit wide, and the MemoryRegionOps handlers are restricted to
32-bit:
static const MemoryRegionOps mchp_pfsoc_mmuart_ops = {
.read = mchp_pfsoc_mmuart_read,
.write = mchp_pfsoc_mmuart_write,
.impl = {
.min_access_size = 4,
.max_access_size = 4,
},
Avoid being triskaidekaphobic, simplify by using the number of
registers.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Tested-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Message-id: 20210925133407.1259392-2-f4bug@amsat.org
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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|---|---|---|
| .. | ||
| avr_usart.h | ||
| bcm2835_aux.h | ||
| cadence_uart.h | ||
| cmsdk-apb-uart.h | ||
| digic-uart.h | ||
| escc.h | ||
| goldfish_tty.h | ||
| ibex_uart.h | ||
| imx_serial.h | ||
| mchp_pfsoc_mmuart.h | ||
| nrf51_uart.h | ||
| parallel.h | ||
| pl011.h | ||
| renesas_sci.h | ||
| riscv_htif.h | ||
| serial.h | ||
| shakti_uart.h | ||
| sifive_uart.h | ||
| stm32f2xx_usart.h | ||
| xilinx_uartlite.h | ||