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238f43809a
This makes CPUTLBEntry agnostic to the address size of the guest. When 32-bit addresses are in effect, we can simply read the low 32 bits of the 64-bit field. Similarly when we need to update the field for setting TLB_NOTDIRTY. For TCG backends that could in theory be big-endian, but in practice are not (arm, loongarch, riscv), use QEMU_BUILD_BUG_ON to document and ensure this is not accidentally missed. For s390x, which is always big-endian, use HOST_BIG_ENDIAN anyway, to document the reason for the adjustment. For sparc64 and ppc64, always perform a 64-bit load, and rely on the following 32-bit comparison to ignore the high bits. Rearrange mips and ppc if ladders for clarity. Reviewed-by: Anton Johansson <anjo@rev.ng> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> |
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| hvf | ||
| kvm | ||
| qtest | ||
| stubs | ||
| tcg | ||
| xen | ||
| accel-blocker.c | ||
| accel-common.c | ||
| accel-softmmu.c | ||
| accel-softmmu.h | ||
| accel-user.c | ||
| dummy-cpus.c | ||
| Kconfig | ||
| meson.build | ||