Stafford Horne 22991cfbdf hw/openrisc/openrisc_sim: Use IRQ splitter when connecting UART ... Currently the OpenRISC SMP configuration only supports 2 cores due to the UART IRQ routing being limited to 2 cores. As was done in commit 1eeffbeb11 ("hw/openrisc/openrisc_sim: Use IRQ splitter when connecting IRQ to multiple CPUs") we can use a splitter to wire more than 2 CPUs. This patch moves serial initialization out to it's own function and uses a splitter to connect multiple CPU irq lines to the UART. Signed-off-by: Stafford Horne <shorne@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>		2022-02-25 15:42:23 +09:00
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cputimer.c	Include hw/hw.h exactly where needed	2019-08-16 13:31:52 +02:00
Kconfig	hw/openrisc/openrisc_sim: Use IRQ splitter when connecting IRQ to multiple CPUs	2020-12-15 12:04:29 +00:00
meson.build	target/openrisc: Move pic_cpu code into CPU object proper	2020-12-15 12:04:30 +00:00
openrisc_sim.c	hw/openrisc/openrisc_sim: Use IRQ splitter when connecting UART	2022-02-25 15:42:23 +09:00