Philippe Mathieu-Daudé d577dbaac7 target/ppc: Use tcg_gen_abs_i32 ... Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20190423102145.14812-2-f4bug@amsat.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>		2019-05-13 22:52:08 +00:00
..
dfp-impl.inc.c	target/ppc: move FP and VMX registers into aligned vsr register array	2019-01-09 09:28:14 +11:00
dfp-ops.inc.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
fp-impl.inc.c	target/ppc: Style fixes for translate/fp-impl.inc.c	2019-04-26 11:37:57 +10:00
fp-ops.inc.c	target/ppc: add external PID support	2018-11-08 12:04:40 +11:00
spe-impl.inc.c	target/ppc: Use tcg_gen_abs_i32	2019-05-13 22:52:08 +00:00
spe-ops.inc.c	Move target-* CPU file into a target/ folder	2016-12-20 21:52:12 +01:00
vmx-impl.inc.c	tcg: Specify optional vector requirements with a list	2019-05-13 14:44:03 -07:00
vmx-ops.inc.c	Changes requirement for "vsubsbs" instruction	2018-12-21 09:29:12 +11:00
vsx-impl.inc.c	target/ppc: Style fixes for translate/vsx-impl.inc.c	2019-04-26 11:37:57 +10:00
vsx-ops.inc.c	target-ppc: Add xscvqpudz and xscvqpuwz instructions	2017-02-22 11:28:28 +11:00