Jonathan Cameron cb70b7e871 hw/cxl: Fix size of constant in interleave granularity function. ... Whilst the interleave granularity is always small enough that this isn't a real problem (much less than 4GiB) let's change the constant to ULL to fix the coverity warning. Reported-by: Peter Maydell <peter.maydell@linaro.org> Fixes: 829de299d1 ("hw/cxl/component: Add utils for interleave parameter encoding/decoding") Fixes: Coverity CID 1488868 Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20220701132300.2264-4-Jonathan.Cameron@huawei.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>		2022-07-26 10:40:58 -04:00
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cxl.h	pci-bridge/cxl_upstream: Add a CXL switch upstream port	2022-06-16 12:54:57 -04:00
cxl_component.h	hw/cxl: Fix size of constant in interleave granularity function.	2022-07-26 10:40:58 -04:00
cxl_device.h	mem/cxl_type3: Add read and write functions for associated hostmem.	2022-05-13 07:57:26 -04:00
cxl_host.h	pci/pci_expander_bridge: For CXL HB delay the HB register memory region setup.	2022-06-09 19:32:49 -04:00
cxl_pci.h	hw/cxl/device: Add a memory device (8.2.8.5)	2022-05-13 06:13:36 -04:00