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13cd1d6eaf
On PolarFire SoC, some peripherals (eg the PCI root port) are clocked by
"Clock Conditioning Circuitry" in the FPGA. The specific clock depends
on the FPGA bitstream & can be locked to one particular {D,P}LL - in the
Icicle Kit Reference Design v2022.09 or later this is/will be the case.
Linux v6.1+ will have a driver for this peripheral and devicetrees that
previously relied on "fixed-frequency" clock nodes have been switched
over to clock-controller nodes. The IOSCB region is represented in QEMU,
but the specific region of it that the CCCs occupy has not so v6.1-rcN
kernels fail to boot in QEMU.
Add the regions as unimplemented so that the status-quo in terms of boot
is maintained.
Acked-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Message-Id: <20221117225518.4102575-2-conor@kernel.org>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
51 lines
1.5 KiB
C
51 lines
1.5 KiB
C
/*
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* Microchip PolarFire SoC IOSCB module emulation
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*
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* Copyright (c) 2020 Wind River Systems, Inc.
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*
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* Author:
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* Bin Meng <bin.meng@windriver.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 or
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* (at your option) version 3 of the License.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef MCHP_PFSOC_IOSCB_H
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#define MCHP_PFSOC_IOSCB_H
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typedef struct MchpPfSoCIoscbState {
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SysBusDevice parent;
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MemoryRegion container;
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MemoryRegion lane01;
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MemoryRegion lane23;
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MemoryRegion ctrl;
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MemoryRegion cfg;
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MemoryRegion ccc;
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MemoryRegion pll_mss;
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MemoryRegion cfm_mss;
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MemoryRegion pll_ddr;
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MemoryRegion bc_ddr;
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MemoryRegion io_calib_ddr;
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MemoryRegion pll_sgmii;
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MemoryRegion dll_sgmii;
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MemoryRegion cfm_sgmii;
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MemoryRegion bc_sgmii;
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MemoryRegion io_calib_sgmii;
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} MchpPfSoCIoscbState;
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#define TYPE_MCHP_PFSOC_IOSCB "mchp.pfsoc.ioscb"
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#define MCHP_PFSOC_IOSCB(obj) \
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OBJECT_CHECK(MchpPfSoCIoscbState, (obj), TYPE_MCHP_PFSOC_IOSCB)
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#endif /* MCHP_PFSOC_IOSCB_H */
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