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qemu/target/arm
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Peter Maydell 09754ca867 target/arm: Implement AArch32 DBGDEVID, DBGDEVID1, DBGDEVID2 
Starting with v7 of the debug architecture, there are three extra
ID registers that add information on top of that provided in
DBGDIDR. These are DBGDEVID, DBGDEVID1 and DBGDEVID2. In the
v7 debug architecture, DBGDEVID is optional, present only of
DBGDIDR.DEVID_imp is set. In v7.1 all three must be present.

Implement the missing registers.  Note that we only need to set the
values in the ARMISARegisters struct for the CPUs Cortex-A7, A15,
A53, A57 and A72 (plus the 32-bit 'max' which uses the Cortex-A53
values): earlier CPUs didn't implement v7 of the architecture, and
our other 64-bit CPUs (Cortex-A76, Neoverse-N1 and A64fx) don't have
AArch32 support at EL1.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20220630194116.3438513-5-peter.maydell@linaro.org
2022-07-07 11:37:33 +01:00
..
hvf Fix 'writeable' typos 2022-06-08 19:38:47 +01:00
a32-uncond.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
a32.decode target/arm: Implement ESB instruction 2022-05-09 11:47:54 +01:00
arch_dump.c target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_el 2022-06-08 19:38:57 +01:00
arm-powerctl.c arm/arm-powerctl: rebuild hflags after setting CP15 bits in arm_set_cpu_on() 2019-12-20 14:03:00 +00:00
arm-powerctl.h target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset() 2019-02-28 11:03:04 +00:00
arm_ldst.h accel/tcg: Add DisasContextBase argument to translator_ld* 2021-09-14 12:00:20 -07:00
common-semi-target.h semihosting: Split out common-semi-target.h 2022-06-28 04:35:07 +05:30
cpregs.h target/arm: Move define_debug_regs() to debug_helper.c 2022-07-07 11:37:33 +01:00
cpu-param.h Normalize header guard symbol definition 2022-05-11 16:50:26 +02:00
cpu-qom.h target: Introduce and use OBJECT_DECLARE_CPU_TYPE() macro 2022-03-06 22:23:09 +01:00
cpu.c disas: Remove libvixl disassembler 2022-07-05 10:15:49 +02:00
cpu.h target/arm: Implement AArch32 DBGDEVID, DBGDEVID1, DBGDEVID2 2022-07-07 11:37:33 +01:00
cpu64.c target/arm: Implement AArch32 DBGDEVID, DBGDEVID1, DBGDEVID2 2022-07-07 11:37:33 +01:00
cpu_tcg.c target/arm: Implement AArch32 DBGDEVID, DBGDEVID1, DBGDEVID2 2022-07-07 11:37:33 +01:00
crypto_helper.c crypto: move sm4_sbox from target/arm 2022-04-29 10:47:45 +10:00
debug_helper.c target/arm: Implement AArch32 DBGDEVID, DBGDEVID1, DBGDEVID2 2022-07-07 11:37:33 +01:00
gdbstub.c Fix 'writeable' typos 2022-06-08 19:38:47 +01:00
gdbstub64.c target/arm: Rename sve_zcr_len_for_el to sve_vqm1_for_el 2022-06-08 19:38:57 +01:00
helper-a64.c target/arm: Change CPUArchState.aarch64 to bool 2022-04-22 14:44:54 +01:00
helper-a64.h target/arm: Merge mte_check1, mte_checkN 2021-04-30 11:16:49 +01:00
helper-mve.h target/arm: Implement MVE VRINT insns 2021-09-01 11:08:17 +01:00
helper-sme.h target/arm: Implement SMSTART, SMSTOP 2022-06-27 11:18:17 +01:00
helper-sve.h target/arm: Implement vector float32 to bfloat16 conversion 2021-06-03 16:43:26 +01:00
helper.c target/arm: Move define_debug_regs() to debug_helper.c 2022-07-07 11:37:33 +01:00
helper.h target/arm: Implement SMSTART, SMSTOP 2022-06-27 11:18:17 +01:00
hvf_arm.h target: Use forward declared type instead of structure type 2022-03-06 22:22:40 +01:00
idau.h Use DECLARE_*CHECKER* macros 2020-09-09 09:27:09 -04:00
internals.h target/arm: Move define_debug_regs() to debug_helper.c 2022-07-07 11:37:33 +01:00
iwmmxt_helper.c arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
Kconfig meson: Introduce target-specific Kconfig 2021-07-09 18:21:34 +02:00
kvm-consts.h target/arm: Report KVM's actual PSCI version to guest in dtb 2022-03-02 19:27:37 +00:00
kvm-stub.c target/arm: Avoid bare abort() or assert(0) 2022-05-05 09:35:51 +01:00
kvm.c target/arm: Avoid bare abort() or assert(0) 2022-05-05 09:35:51 +01:00
kvm64.c target/arm: Create ARMVQMap 2022-06-27 11:18:17 +01:00
kvm_arm.h target/arm: Use uint32_t instead of bitmap for sve vq's 2022-06-08 19:38:57 +01:00
m-nocp.decode target/arm: Don't NOCP fault for FPCXT_NS accesses 2021-06-21 16:49:37 +01:00
m_helper.c semihosting: Return void from do_common_semihosting 2022-06-28 04:35:07 +05:30
machine.c target/arm: Add the SME ZA storage to CPUARMState 2022-06-27 11:18:17 +01:00
meson.build target/arm: Implement SMSTART, SMSTOP 2022-06-27 11:18:17 +01:00
monitor.c target/arm: Add cpu properties to control pauth 2021-01-19 14:38:51 +00:00
mte_helper.c exec/exec-all: Move 'qemu/log.h' include in units requiring it 2022-02-21 10:18:06 +01:00
mve.decode target/arm: Implement MVE VRINT insns 2021-09-01 11:08:17 +01:00
mve_helper.c target/arm: Use expand_pred_b in mve_helper.c 2022-06-08 19:38:58 +01:00
neon-dp.decode target/arm: Implement vector float32 to bfloat16 conversion 2021-06-03 16:43:26 +01:00
neon-ls.decode target/arm: Remove duplicate 'plus1' function from Neon and SVE decode 2021-07-18 10:59:47 +01:00
neon-shared.decode target/arm: Remove duplicate 'plus1' function from Neon and SVE decode 2021-07-18 10:59:47 +01:00
neon_helper.c Replace config-time define HOST_WORDS_BIGENDIAN 2022-04-06 10:50:37 +02:00
op_addsub.h Move target-* CPU file into a target/ folder 2016-12-20 21:52:12 +01:00
op_helper.c target/arm: Introduce helper_exception_with_syndrome 2022-06-10 14:32:34 +01:00
pauth_helper.c compiler.h: replace QEMU_NORETURN with G_NORETURN 2022-04-21 17:03:51 +04:00
psci.c target/arm: Support PSCI 1.1 and SMCCC 1.0 2022-03-02 19:27:36 +00:00
ptw.c target/arm: Check V7VE as well as LPAE in arm_pamax 2022-06-27 11:18:17 +01:00
sme_helper.c target/arm: Implement SMSTART, SMSTOP 2022-06-27 11:18:17 +01:00
sve.decode target/arm: Use TRANS_FEAT for FMMLA 2022-05-30 17:05:09 +01:00
sve_helper.c target/arm: Record tagged bit for user-only in sve_probe_page 2022-07-07 11:36:08 +01:00
sve_ldst_internal.h target/arm: Export sve contiguous ldst support functions 2022-06-08 19:38:58 +01:00
syndrome.h target/arm: Add syn_smetrap 2022-06-27 11:18:17 +01:00
t16.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
t32.decode target/arm: Implement ESB instruction 2022-05-09 11:47:54 +01:00
tlb_helper.c target/arm: Move {arm_s1_, }regime_using_lpae_format to tlb_helper.c 2022-06-08 19:38:52 +01:00
trace-events docs: fix references to docs/devel/tracing.rst 2021-06-02 06:51:09 +02:00
trace.h trace: switch position of headers to what Meson requires 2020-08-21 06:18:24 -04:00
translate-a32.h Clean up header guards that don't match their file name 2022-05-11 16:49:06 +02:00
translate-a64.c target/arm: Add SVL to TB flags 2022-06-27 11:18:17 +01:00
translate-a64.h target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h 2022-06-27 11:18:17 +01:00
translate-m-nocp.c target/arm: Introduce gen_exception_insn 2022-06-10 14:32:32 +01:00
translate-mve.c target/arm: Introduce gen_exception_insn 2022-06-10 14:32:32 +01:00
translate-neon.c target/arm: Avoid bare abort() or assert(0) 2022-05-05 09:35:51 +01:00
translate-sve.c target/arm: Move pred_{full, gvec}_reg_{offset, size} to translate-a64.h 2022-06-27 11:18:17 +01:00
translate-vfp.c target/arm: Rename gen_exception_insn to gen_exception_insn_el 2022-06-10 14:32:32 +01:00
translate.c target/arm: Remove default_exception_el 2022-06-10 14:32:34 +01:00
translate.h target/arm: Add SVL to TB flags 2022-06-27 11:18:17 +01:00
vec_helper.c target/arm: Export bfdotadd from vec_helper.c 2022-06-08 19:38:58 +01:00
vec_internal.h target/arm: Export bfdotadd from vec_helper.c 2022-06-08 19:38:58 +01:00
vfp-uncond.decode arm tcg cpus: Fix Lesser GPL version number 2020-11-15 16:42:14 +01:00
vfp.decode target/arm: Don't NOCP fault for FPCXT_NS accesses 2021-06-21 16:49:37 +01:00
vfp_helper.c target/arm: Check NaN mode before silencing NaN 2021-07-02 11:48:36 +01:00