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Cache topology needs to be defined based on CPU topology levels. Thus, define CPU topology enumeration in qapi/machine.json to make it generic for all architectures. To match the general topology naming style, rename CPU_TOPO_LEVEL_* to CPU_TOPOLOGY_LEVEL_*, and rename SMT and package levels to thread and socket. Also, enumerate additional topology levels for non-i386 arches, and add a CPU_TOPOLOGY_LEVEL_DEFAULT to help future smp-cache object to work with compatibility requirement of arch-specific cache topology models. Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Tested-by: Yongwei Ma <yongwei.ma@intel.com> Reviewed-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Acked-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20241101083331.340178-3-zhao1.liu@intel.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> |
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| .. | ||
| apic-msidef.h | ||
| apic.h | ||
| apic_internal.h | ||
| hostmem-epc.h | ||
| intel_iommu.h | ||
| microvm.h | ||
| nitro_enclave.h | ||
| pc.h | ||
| sgx-epc.h | ||
| topology.h | ||
| vmport.h | ||
| x86-iommu.h | ||
| x86.h | ||
| xen_arch_hvm.h | ||