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On the AST2400 and AST2500 platforms, the system can only be reset by enabling the WDT (Watchdog Timer) and waiting for the WDT timeout. However, starting from the AST2600 platform, the reset event can be triggered directly and intentionally by software, without relying on the WDT timeout. This mechanism, referred to as "software restart", is implemented in hardware. When using the software restart mechanism, the WDT counter is not enabled. To trigger a reset generation in software mode, write 0xAEEDF123 to register 0x24 and software mode reset only support SOC reset mode. A new function, "aspeed_wdt_is_soc_reset_mode", is introduced to determine whether the SoC reset mode is active. Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Link: https://lore.kernel.org/qemu-devel/20250124030249.1706996-3-jamin_lin@aspeedtech.com Signed-off-by: Cédric Le Goater <clg@redhat.com> |
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| .. | ||
| allwinner-wdt.c | ||
| cmsdk-apb-watchdog.c | ||
| Kconfig | ||
| meson.build | ||
| sbsa_gwdt.c | ||
| spapr_watchdog.c | ||
| trace-events | ||
| trace.h | ||
| watchdog.c | ||
| wdt_aspeed.c | ||
| wdt_diag288.c | ||
| wdt_i6300esb.c | ||
| wdt_ib700.c | ||
| wdt_imx2.c | ||