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Per ast2500_2520_datasheet_v1.8 and ast2600v11.pdf, the default value of WDT00 and WDT04 is 0x014FB180 for ast2500/ast2600. Add default_status and default_reload_value attributes for storing counter status and reload value as they are different from ast2400. Signed-off-by: Troy Lee <troy_lee@aspeedtech.com> Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com> Signed-off-by: Steven Lee <steven_lee@aspeedtech.com> Reviewed-by: Cédric Le Goater <clg@kaod.org> Message-Id: <20220401083850.15266-4-jamin_lin@aspeedtech.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
52 lines
1.2 KiB
C
52 lines
1.2 KiB
C
/*
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* ASPEED Watchdog Controller
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*
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* Copyright (C) 2016-2017 IBM Corp.
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*
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* This code is licensed under the GPL version 2 or later. See the
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* COPYING file in the top-level directory.
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*/
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#ifndef WDT_ASPEED_H
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#define WDT_ASPEED_H
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#include "hw/misc/aspeed_scu.h"
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#include "hw/sysbus.h"
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#include "qom/object.h"
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#define TYPE_ASPEED_WDT "aspeed.wdt"
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OBJECT_DECLARE_TYPE(AspeedWDTState, AspeedWDTClass, ASPEED_WDT)
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#define TYPE_ASPEED_2400_WDT TYPE_ASPEED_WDT "-ast2400"
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#define TYPE_ASPEED_2500_WDT TYPE_ASPEED_WDT "-ast2500"
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#define TYPE_ASPEED_2600_WDT TYPE_ASPEED_WDT "-ast2600"
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#define ASPEED_WDT_REGS_MAX (0x20 / 4)
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struct AspeedWDTState {
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/*< private >*/
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SysBusDevice parent_obj;
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QEMUTimer *timer;
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/*< public >*/
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MemoryRegion iomem;
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uint32_t regs[ASPEED_WDT_REGS_MAX];
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AspeedSCUState *scu;
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uint32_t pclk_freq;
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};
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struct AspeedWDTClass {
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SysBusDeviceClass parent_class;
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uint32_t offset;
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uint32_t ext_pulse_width_mask;
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uint32_t reset_ctrl_reg;
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void (*reset_pulse)(AspeedWDTState *s, uint32_t property);
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void (*wdt_reload)(AspeedWDTState *s);
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uint64_t (*sanitize_ctrl)(uint64_t data);
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uint32_t default_status;
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uint32_t default_reload_value;
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};
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#endif /* WDT_ASPEED_H */
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