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Huang Borong 29abd3d112 hw/riscv: Initial support for BOSC's Xiangshan Kunminghu FPGA prototype ... This implementation provides emulation for the Xiangshan Kunminghu FPGA prototype platform, including support for UART, CLINT, IMSIC, and APLIC devices. More details can be found at https://github.com/OpenXiangShan/XiangShan Signed-off-by: qinshaoqing <qinshaoqing@bosc.ac.cn> Signed-off-by: Yang Wang <wangyang@bosc.ac.cn> Signed-off-by: Yu Hu <819258943@qq.com> Signed-off-by: Ran Wang <wangran@bosc.ac.cn> Signed-off-by: Borong Huang <3543977024@qq.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Message-ID: <20250617074222.17618-1-wangran@bosc.ac.cn> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>		2025-07-04 21:09:49 +10:00
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boot.h	hw/riscv: Add the checking if DTB overlaps to kernel or initrd	2024-12-20 11:22:47 +10:00
boot_opensbi.h	target/riscv: Add fw_dynamic_info32 for booting RV32 OpenSBI	2024-10-30 11:22:07 +10:00
iommu.h	hw/riscv/riscv-iommu: Remove definition of RISCVIOMMU[Pci|Sys]Class	2025-06-10 12:59:09 +02:00
microchip_pfsoc.h	hw/riscv: Configurable MPFS CLINT timebase freq	2025-05-19 13:30:24 +10:00
numa.h	include: Rename sysemu/ -> system/	2024-12-20 17:44:56 +01:00
opentitan.h	hw/riscv/opentitan: Correct OpenTitanState parent type/size	2023-06-13 17:19:42 +10:00
riscv_hart.h	target/riscv: Handle Smrnmi interrupt and exception	2025-01-19 09:44:34 +10:00
shakti_c.h	hw/intc: sifive_plic: Change "priority-base" to start from interrupt source 0	2023-01-06 10:42:55 +10:00
sifive_cpu.h	riscv: Add a sifive_cpu.h to include both E and U cpu type defines	2019-09-17 08:42:46 -07:00
sifive_e.h	hw/riscv: sifive_e: Support the watchdog timer of HiFive 1 rev b.	2023-07-10 22:29:15 +10:00
sifive_u.h	hw/riscv: Move the dtb load bits outside of create_fdt()	2023-03-01 17:19:14 -08:00
spike.h	hw/riscv/spike: use 'fdt' from MachineState	2023-01-20 10:14:13 +10:00
virt.h	hw/riscv/virt: Add the BDF of IOMMU to RISCVVirtState structure	2025-05-19 11:07:13 +10:00
xiangshan_kmh.h	hw/riscv: Initial support for BOSC's Xiangshan Kunminghu FPGA prototype	2025-07-04 21:09:49 +10:00