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cdc8d7cada
Invert the 'no_sdcard' logic, renaming it as the more explicit "auto_create_sdcard". Machines are supposed to create a SD Card drive when this flag is set. In many cases it doesn't make much sense (as boards don't expose SD Card host controller), but this is patch only aims to expose that nonsense; so no logical change intended (mechanical patch using gsed). Most of the changes are: - mc->no_sdcard = ON_OFF_AUTO_OFF; + mc->auto_create_sdcard = true; Except in . hw/core/null-machine.c . hw/arm/xilinx_zynq.c . hw/s390x/s390-virtio-ccw.c where the disabled option is manually removed (since default): - mc->no_sdcard = ON_OFF_AUTO_ON; + mc->auto_create_sdcard = false; - mc->auto_create_sdcard = false; and in system/vl.c we change the 'default_sdcard' type to boolean. Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20250204200934.65279-4-philmd@linaro.org>
116 lines
3.7 KiB
C
116 lines
3.7 KiB
C
/*
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* SABRELITE Board System emulation.
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*
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* Copyright (c) 2015 Jean-Christophe Dubois <jcd@tribudubois.net>
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*
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* This code is licensed under the GPL, version 2 or later.
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* See the file `COPYING' in the top level directory.
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*
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* It (partially) emulates a sabrelite board, with a Freescale
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* i.MX6 SoC
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*/
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "hw/arm/fsl-imx6.h"
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#include "hw/arm/boot.h"
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#include "hw/boards.h"
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#include "hw/qdev-properties.h"
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#include "qemu/error-report.h"
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#include "system/qtest.h"
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static struct arm_boot_info sabrelite_binfo = {
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/* DDR memory start */
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.loader_start = FSL_IMX6_MMDC_ADDR,
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/* No board ID, we boot from DT tree */
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.board_id = -1,
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};
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/* No need to do any particular setup for secondary boot */
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static void sabrelite_write_secondary(ARMCPU *cpu,
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const struct arm_boot_info *info)
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{
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}
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/* Secondary cores are reset through SRC device */
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static void sabrelite_reset_secondary(ARMCPU *cpu,
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const struct arm_boot_info *info)
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{
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}
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static void sabrelite_init(MachineState *machine)
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{
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FslIMX6State *s;
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/* Check the amount of memory is compatible with the SOC */
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if (machine->ram_size > FSL_IMX6_MMDC_SIZE) {
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error_report("RAM size " RAM_ADDR_FMT " above max supported (%08x)",
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machine->ram_size, FSL_IMX6_MMDC_SIZE);
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exit(1);
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}
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s = FSL_IMX6(object_new(TYPE_FSL_IMX6));
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object_property_add_child(OBJECT(machine), "soc", OBJECT(s));
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/* Ethernet PHY address is 6 */
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object_property_set_int(OBJECT(s), "fec-phy-num", 6, &error_fatal);
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qdev_realize(DEVICE(s), NULL, &error_fatal);
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memory_region_add_subregion(get_system_memory(), FSL_IMX6_MMDC_ADDR,
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machine->ram);
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{
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/*
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* TODO: Ideally we would expose the chip select and spi bus on the
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* SoC object using alias properties; then we would not need to
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* directly access the underlying spi device object.
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*/
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/* Add the sst25vf016b NOR FLASH memory to first SPI */
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Object *spi_dev;
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spi_dev = object_resolve_path_component(OBJECT(s), "spi1");
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if (spi_dev) {
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SSIBus *spi_bus;
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spi_bus = (SSIBus *)qdev_get_child_bus(DEVICE(spi_dev), "spi");
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if (spi_bus) {
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DeviceState *flash_dev;
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qemu_irq cs_line;
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DriveInfo *dinfo = drive_get(IF_MTD, 0, 0);
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flash_dev = qdev_new("sst25vf016b");
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if (dinfo) {
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qdev_prop_set_drive_err(flash_dev, "drive",
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blk_by_legacy_dinfo(dinfo),
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&error_fatal);
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}
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qdev_realize_and_unref(flash_dev, BUS(spi_bus), &error_fatal);
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cs_line = qdev_get_gpio_in_named(flash_dev, SSI_GPIO_CS, 0);
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qdev_connect_gpio_out(DEVICE(&s->gpio[2]), 19, cs_line);
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}
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}
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}
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sabrelite_binfo.ram_size = machine->ram_size;
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sabrelite_binfo.secure_boot = true;
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sabrelite_binfo.write_secondary_boot = sabrelite_write_secondary;
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sabrelite_binfo.secondary_cpu_reset_hook = sabrelite_reset_secondary;
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if (!qtest_enabled()) {
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arm_load_kernel(&s->cpu[0], machine, &sabrelite_binfo);
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}
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}
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static void sabrelite_machine_init(MachineClass *mc)
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{
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mc->desc = "Freescale i.MX6 Quad SABRE Lite Board (Cortex-A9)";
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mc->init = sabrelite_init;
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mc->max_cpus = FSL_IMX6_NUM_CPUS;
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mc->ignore_memory_transaction_failures = true;
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mc->default_ram_id = "sabrelite.ram";
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mc->auto_create_sdcard = true;
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}
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DEFINE_MACHINE("sabrelite", sabrelite_machine_init)
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