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hw/adc: Remove MAX111X device
The MAX111X ADC device was used only by the XScale-based Zaurus machine types. Now they have all been removed, we can drop this device model too. Because this device is an SSI device, in theory it could be created by users on the command line for boards with a different SSI controller, but we don't believe users are doing this -- it would be impossible on the command line to connect up the GPIO inputs which correspond to ADC inputs, or the GPIO output which is an interrupt line. The only example a web search produces for "device max1111" or "device max1110" is our own bug report https://gitlab.com/qemu-project/qemu/-/issues/2228 where it's used as an example of a bogus command that causes an assertion in an aspeed machine type that wasn't expecting anything other than flash devices on its SMC bus. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241003140010.1653808-2-peter.maydell@linaro.org
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@ -1,5 +1,2 @@
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config STM32F2XX_ADC
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bool
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config MAX111X
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bool
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236
hw/adc/max111x.c
236
hw/adc/max111x.c
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@ -1,236 +0,0 @@
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/*
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* Maxim MAX1110/1111 ADC chip emulation.
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*
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* Copyright (c) 2006 Openedhand Ltd.
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* Written by Andrzej Zaborowski <balrog@zabor.org>
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*
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* This code is licensed under the GNU GPLv2.
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*
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* Contributions after 2012-01-13 are licensed under the terms of the
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* GNU GPL, version 2 or (at your option) any later version.
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*/
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#include "qemu/osdep.h"
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#include "hw/adc/max111x.h"
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#include "hw/irq.h"
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#include "migration/vmstate.h"
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#include "qemu/module.h"
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#include "hw/qdev-properties.h"
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/* Control-byte bitfields */
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#define CB_PD0 (1 << 0)
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#define CB_PD1 (1 << 1)
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#define CB_SGL (1 << 2)
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#define CB_UNI (1 << 3)
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#define CB_SEL0 (1 << 4)
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#define CB_SEL1 (1 << 5)
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#define CB_SEL2 (1 << 6)
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#define CB_START (1 << 7)
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#define CHANNEL_NUM(v, b0, b1, b2) \
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((((v) >> (2 + (b0))) & 4) | \
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(((v) >> (3 + (b1))) & 2) | \
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(((v) >> (4 + (b2))) & 1))
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static uint32_t max111x_read(MAX111xState *s)
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{
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if (!s->tb1)
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return 0;
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switch (s->cycle ++) {
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case 1:
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return s->rb2;
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case 2:
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return s->rb3;
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}
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return 0;
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}
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/* Interpret a control-byte */
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static void max111x_write(MAX111xState *s, uint32_t value)
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{
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int measure, chan;
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/* Ignore the value if START bit is zero */
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if (!(value & CB_START))
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return;
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s->cycle = 0;
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if (!(value & CB_PD1)) {
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s->tb1 = 0;
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return;
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}
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s->tb1 = value;
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if (s->inputs == 8)
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chan = CHANNEL_NUM(value, 1, 0, 2);
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else
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chan = CHANNEL_NUM(value & ~CB_SEL0, 0, 1, 2);
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if (value & CB_SGL)
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measure = s->input[chan] - s->com;
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else
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measure = s->input[chan] - s->input[chan ^ 1];
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if (!(value & CB_UNI))
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measure ^= 0x80;
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s->rb2 = (measure >> 2) & 0x3f;
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s->rb3 = (measure << 6) & 0xc0;
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/* FIXME: When should the IRQ be lowered? */
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qemu_irq_raise(s->interrupt);
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}
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static uint32_t max111x_transfer(SSIPeripheral *dev, uint32_t value)
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{
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MAX111xState *s = MAX_111X(dev);
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max111x_write(s, value);
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return max111x_read(s);
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}
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static const VMStateDescription vmstate_max111x = {
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.name = "max111x",
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.version_id = 1,
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.minimum_version_id = 1,
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.fields = (const VMStateField[]) {
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VMSTATE_SSI_PERIPHERAL(parent_obj, MAX111xState),
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VMSTATE_UINT8(tb1, MAX111xState),
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VMSTATE_UINT8(rb2, MAX111xState),
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VMSTATE_UINT8(rb3, MAX111xState),
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VMSTATE_INT32_EQUAL(inputs, MAX111xState, NULL),
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VMSTATE_INT32(com, MAX111xState),
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VMSTATE_ARRAY_INT32_UNSAFE(input, MAX111xState, inputs,
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vmstate_info_uint8, uint8_t),
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VMSTATE_END_OF_LIST()
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}
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};
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static void max111x_input_set(void *opaque, int line, int value)
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{
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MAX111xState *s = MAX_111X(opaque);
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assert(line >= 0 && line < s->inputs);
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s->input[line] = value;
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}
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static int max111x_init(SSIPeripheral *d, int inputs)
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{
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DeviceState *dev = DEVICE(d);
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MAX111xState *s = MAX_111X(dev);
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qdev_init_gpio_out(dev, &s->interrupt, 1);
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qdev_init_gpio_in(dev, max111x_input_set, inputs);
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s->inputs = inputs;
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return 0;
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}
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static void max1110_realize(SSIPeripheral *dev, Error **errp)
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{
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max111x_init(dev, 8);
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}
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static void max1111_realize(SSIPeripheral *dev, Error **errp)
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{
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max111x_init(dev, 4);
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}
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static void max111x_reset(DeviceState *dev)
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{
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MAX111xState *s = MAX_111X(dev);
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int i;
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for (i = 0; i < s->inputs; i++) {
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s->input[i] = s->reset_input[i];
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}
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s->com = 0;
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s->tb1 = 0;
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s->rb2 = 0;
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s->rb3 = 0;
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s->cycle = 0;
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}
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static Property max1110_properties[] = {
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/* Reset values for ADC inputs */
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DEFINE_PROP_UINT8("input0", MAX111xState, reset_input[0], 0xf0),
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DEFINE_PROP_UINT8("input1", MAX111xState, reset_input[1], 0xe0),
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DEFINE_PROP_UINT8("input2", MAX111xState, reset_input[2], 0xd0),
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DEFINE_PROP_UINT8("input3", MAX111xState, reset_input[3], 0xc0),
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DEFINE_PROP_END_OF_LIST(),
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};
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static Property max1111_properties[] = {
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/* Reset values for ADC inputs */
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DEFINE_PROP_UINT8("input0", MAX111xState, reset_input[0], 0xf0),
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DEFINE_PROP_UINT8("input1", MAX111xState, reset_input[1], 0xe0),
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DEFINE_PROP_UINT8("input2", MAX111xState, reset_input[2], 0xd0),
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DEFINE_PROP_UINT8("input3", MAX111xState, reset_input[3], 0xc0),
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DEFINE_PROP_UINT8("input4", MAX111xState, reset_input[4], 0xb0),
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DEFINE_PROP_UINT8("input5", MAX111xState, reset_input[5], 0xa0),
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DEFINE_PROP_UINT8("input6", MAX111xState, reset_input[6], 0x90),
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DEFINE_PROP_UINT8("input7", MAX111xState, reset_input[7], 0x80),
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DEFINE_PROP_END_OF_LIST(),
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};
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static void max111x_class_init(ObjectClass *klass, void *data)
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{
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SSIPeripheralClass *k = SSI_PERIPHERAL_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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k->transfer = max111x_transfer;
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device_class_set_legacy_reset(dc, max111x_reset);
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dc->vmsd = &vmstate_max111x;
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set_bit(DEVICE_CATEGORY_MISC, dc->categories);
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}
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static const TypeInfo max111x_info = {
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.name = TYPE_MAX_111X,
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.parent = TYPE_SSI_PERIPHERAL,
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.instance_size = sizeof(MAX111xState),
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.class_init = max111x_class_init,
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.abstract = true,
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};
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static void max1110_class_init(ObjectClass *klass, void *data)
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{
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SSIPeripheralClass *k = SSI_PERIPHERAL_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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k->realize = max1110_realize;
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device_class_set_props(dc, max1110_properties);
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}
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static const TypeInfo max1110_info = {
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.name = TYPE_MAX_1110,
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.parent = TYPE_MAX_111X,
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.class_init = max1110_class_init,
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};
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static void max1111_class_init(ObjectClass *klass, void *data)
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{
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SSIPeripheralClass *k = SSI_PERIPHERAL_CLASS(klass);
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DeviceClass *dc = DEVICE_CLASS(klass);
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k->realize = max1111_realize;
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device_class_set_props(dc, max1111_properties);
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}
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static const TypeInfo max1111_info = {
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.name = TYPE_MAX_1111,
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.parent = TYPE_MAX_111X,
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.class_init = max1111_class_init,
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};
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static void max111x_register_types(void)
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{
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type_register_static(&max111x_info);
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type_register_static(&max1110_info);
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type_register_static(&max1111_info);
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}
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type_init(max111x_register_types)
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@ -2,4 +2,3 @@ system_ss.add(when: 'CONFIG_STM32F2XX_ADC', if_true: files('stm32f2xx_adc.c'))
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system_ss.add(when: 'CONFIG_ASPEED_SOC', if_true: files('aspeed_adc.c'))
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system_ss.add(when: 'CONFIG_NPCM7XX', if_true: files('npcm7xx_adc.c'))
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system_ss.add(when: 'CONFIG_ZYNQ', if_true: files('zynq-xadc.c'))
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system_ss.add(when: 'CONFIG_MAX111X', if_true: files('max111x.c'))
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