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DVMA translation errors raise a module error irq (NMI)

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git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3880 c046a42c-6fe2-441c-8c8c-71466251a162
This commit is contained in:
blueswir1 2008-01-01 17:04:45 +00:00
parent 4254fab8f9
commit ff403da6a7
3 changed files with 28 additions and 8 deletions
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23
hw/iommu.c
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@ -112,21 +112,28 @@ typedef struct IOMMUState {
uint32_t regs[IOMMU_NREGS];
target_phys_addr_t iostart;
uint32_t version;
qemu_irq irq;
} IOMMUState;
static uint32_t iommu_mem_readw(void *opaque, target_phys_addr_t addr)
{
IOMMUState *s = opaque;
target_phys_addr_t saddr;
uint32_t ret;
saddr = (addr - s->addr) >> 2;
switch (saddr) {
default:
DPRINTF("read reg[%d] = %x\n", (int)saddr, s->regs[saddr]);
return s->regs[saddr];
ret = s->regs[saddr];
break;
case IOMMU_AFAR:
case IOMMU_AFSR:
ret = s->regs[saddr];
qemu_irq_lower(s->irq);
break;
}
return 0;
DPRINTF("read reg[%d] = %x\n", (int)saddr, ret);
return ret;
}
static void iommu_mem_writew(void *opaque, target_phys_addr_t addr,
@ -180,8 +187,13 @@ static void iommu_mem_writew(void *opaque, target_phys_addr_t addr,
DPRINTF("page flush %x\n", val);
s->regs[saddr] = val & IOMMU_PGFLUSH_MASK;
break;
case IOMMU_AFAR:
s->regs[saddr] = val;
qemu_irq_lower(s->irq);
break;
case IOMMU_AFSR:
s->regs[saddr] = (val & IOMMU_AFSR_MASK) | IOMMU_AFSR_RESV;
qemu_irq_lower(s->irq);
break;
case IOMMU_SBCFG0:
case IOMMU_SBCFG1:
@ -255,6 +267,7 @@ static void iommu_bad_addr(IOMMUState *s, target_phys_addr_t addr,
if (!is_write)
s->regs[IOMMU_AFSR] |= IOMMU_AFSR_RD;
s->regs[IOMMU_AFAR] = addr;
qemu_irq_raise(s->irq);
}
void sparc_iommu_memory_rw(void *opaque, target_phys_addr_t addr,
@ -324,9 +337,10 @@ static void iommu_reset(void *opaque)
s->regs[IOMMU_CTRL] = s->version;
s->regs[IOMMU_ARBEN] = IOMMU_MID;
s->regs[IOMMU_AFSR] = IOMMU_AFSR_RESV;
qemu_irq_lower(s->irq);
}
void *iommu_init(target_phys_addr_t addr, uint32_t version)
void *iommu_init(target_phys_addr_t addr, uint32_t version, qemu_irq irq)
{
IOMMUState *s;
int iommu_io_memory;
@ -337,6 +351,7 @@ void *iommu_init(target_phys_addr_t addr, uint32_t version)
s->addr = addr;
s->version = version;
s->irq = irq;
iommu_io_memory = cpu_register_io_memory(0, iommu_mem_read,
iommu_mem_write, s);