motorhead/qemu
1
0
Fork 0
mirror of https://github.com/Motorhead1991/qemu.git synced 2025-08-08 02:03:56 -06:00
Code Issues Projects Releases Packages Wiki Activity Actions

tcg: Formalize tcg_out_goto_ptr

Browse source 
Split these functions out from tcg_out_op.
Define outop_goto_ptr generically.
Call tcg_out_goto_ptr from tcg_reg_alloc_op.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
This commit is contained in:
Richard Henderson 2025-01-20 21:57:32 -08:00
parent 3752a5a5ba
commit fee03fdde3
11 changed files with 71 additions and 80 deletions
Download patch file Download diff file Expand all files Collapse all files

22
tcg/mips/tcg-target.c.inc
View file

@ -1571,6 +1571,16 @@ static void tcg_out_goto_tb(TCGContext *s, int which)
}
}
static void tcg_out_goto_ptr(TCGContext *s, TCGReg a0)
{
tcg_out_opc_reg(s, OPC_JR, 0, a0, 0);
if (TCG_TARGET_REG_BITS == 64) {
tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_TB, a0);
} else {
tcg_out_nop(s);
}
}
void tb_target_set_jmp_target(const TranslationBlock *tb, int n,
uintptr_t jmp_rx, uintptr_t jmp_rw)
{
@ -2277,15 +2287,6 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, TCGType type,
a2 = args[2];
switch (opc) {
case INDEX_op_goto_ptr:
/* jmp to the given host address (could be epilogue) */
tcg_out_opc_reg(s, OPC_JR, 0, a0, 0);
if (TCG_TARGET_REG_BITS == 64) {
tcg_out_mov(s, TCG_TYPE_PTR, TCG_REG_TB, a0);
} else {
tcg_out_nop(s);
}
break;
case INDEX_op_ld8u_i32:
case INDEX_op_ld8u_i64:
i1 = OPC_LBU;
@ -2364,9 +2365,6 @@ static TCGConstraintSetIndex
tcg_target_op_def(TCGOpcode op, TCGType type, unsigned flags)
{
switch (op) {
case INDEX_op_goto_ptr:
return C_O0_I1(r);
case INDEX_op_ld8u_i32:
case INDEX_op_ld8s_i32:
case INDEX_op_ld16u_i32: