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aspeed: add a GPIO controller to the SoC

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Signed-off-by: Rashmica Gupta <rashmica.g@gmail.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20190904070506.1052-3-clg@kaod.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
This commit is contained in:
Rashmica Gupta 2019-09-04 09:04:58 +02:00 • committed by Peter Maydell
parent 4b7f956862
commit fdcc7c0631
2 changed files with 20 additions and 0 deletions
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3
include/hw/arm/aspeed_soc.h
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@ -23,6 +23,7 @@
#include "hw/watchdog/wdt_aspeed.h"
#include "hw/net/ftgmac100.h"
#include "target/arm/cpu.h"
#include "hw/gpio/aspeed_gpio.h"
#define ASPEED_SPIS_NUM 2
#define ASPEED_WDTS_NUM 3
@ -48,6 +49,7 @@ typedef struct AspeedSoCState {
AspeedSDMCState sdmc;
AspeedWDTState wdt[ASPEED_WDTS_NUM];
FTGMAC100State ftgmac100[ASPEED_MACS_NUM];
AspeedGPIOState gpio;
} AspeedSoCState;
#define TYPE_ASPEED_SOC "aspeed-soc"
@ -61,6 +63,7 @@ typedef struct AspeedSoCInfo {
int spis_num;
const char *fmc_typename;
const char **spi_typename;
const char *gpio_typename;
int wdts_num;
const int *irqmap;
const hwaddr *memmap;