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Move target-* CPU file into a target/ folder
We've currently got 18 architectures in QEMU, and thus 18 target-xxx folders in the root folder of the QEMU source tree. More architectures (e.g. RISC-V, AVR) are likely to be included soon, too, so the main folder of the QEMU sources slowly gets quite overcrowded with the target-xxx folders. To disburden the main folder a little bit, let's move the target-xxx folders into a dedicated target/ folder, so that target-xxx/ simply becomes target/xxx/ instead. Acked-by: Laurent Vivier <laurent@vivier.eu> [m68k part] Acked-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> [tricore part] Acked-by: Michael Walle <michael@walle.cc> [lm32 part] Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> [s390x part] Reviewed-by: Christian Borntraeger <borntraeger@de.ibm.com> [s390x part] Acked-by: Eduardo Habkost <ehabkost@redhat.com> [i386 part] Acked-by: Artyom Tarasenko <atar4qemu@gmail.com> [sparc part] Acked-by: Richard Henderson <rth@twiddle.net> [alpha part] Acked-by: Max Filippov <jcmvbkbc@gmail.com> [xtensa part] Reviewed-by: David Gibson <david@gibson.dropbear.id.au> [ppc part] Acked-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> [crisµblaze part] Acked-by: Guan Xuetao <gxt@mprc.pku.edu.cn> [unicore32 part] Signed-off-by: Thomas Huth <thuth@redhat.com>
This commit is contained in:
Thomas Huth
parent
82ecffa8c0
commit
fcf5ef2ab5
369 changed files with 78 additions and 80 deletions
301
target/openrisc/fpu_helper.c
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301
target/openrisc/fpu_helper.c
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/*
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* OpenRISC float helper routines
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*
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* Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
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* Feng Gao <gf91597@gmail.com>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*/
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#include "qemu/osdep.h"
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#include "cpu.h"
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#include "exec/helper-proto.h"
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#include "exception.h"
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static inline uint32_t ieee_ex_to_openrisc(OpenRISCCPU *cpu, int fexcp)
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{
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int ret = 0;
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if (fexcp) {
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if (fexcp & float_flag_invalid) {
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cpu->env.fpcsr |= FPCSR_IVF;
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ret = 1;
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}
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if (fexcp & float_flag_overflow) {
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cpu->env.fpcsr |= FPCSR_OVF;
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ret = 1;
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}
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if (fexcp & float_flag_underflow) {
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cpu->env.fpcsr |= FPCSR_UNF;
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ret = 1;
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}
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if (fexcp & float_flag_divbyzero) {
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cpu->env.fpcsr |= FPCSR_DZF;
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ret = 1;
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}
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if (fexcp & float_flag_inexact) {
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cpu->env.fpcsr |= FPCSR_IXF;
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ret = 1;
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}
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}
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return ret;
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}
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static inline void update_fpcsr(OpenRISCCPU *cpu)
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{
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int tmp = ieee_ex_to_openrisc(cpu,
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get_float_exception_flags(&cpu->env.fp_status));
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SET_FP_CAUSE(cpu->env.fpcsr, tmp);
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if ((GET_FP_ENABLE(cpu->env.fpcsr) & tmp) &&
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(cpu->env.fpcsr & FPCSR_FPEE)) {
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helper_exception(&cpu->env, EXCP_FPE);
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} else {
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UPDATE_FP_FLAGS(cpu->env.fpcsr, tmp);
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}
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}
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uint64_t HELPER(itofd)(CPUOpenRISCState *env, uint64_t val)
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{
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uint64_t itofd;
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OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
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set_float_exception_flags(0, &cpu->env.fp_status);
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itofd = int32_to_float64(val, &cpu->env.fp_status);
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update_fpcsr(cpu);
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return itofd;
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}
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uint32_t HELPER(itofs)(CPUOpenRISCState *env, uint32_t val)
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{
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uint32_t itofs;
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OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
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set_float_exception_flags(0, &cpu->env.fp_status);
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itofs = int32_to_float32(val, &cpu->env.fp_status);
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update_fpcsr(cpu);
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return itofs;
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}
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uint64_t HELPER(ftoid)(CPUOpenRISCState *env, uint64_t val)
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{
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uint64_t ftoid;
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OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
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set_float_exception_flags(0, &cpu->env.fp_status);
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ftoid = float32_to_int64(val, &cpu->env.fp_status);
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update_fpcsr(cpu);
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return ftoid;
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}
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uint32_t HELPER(ftois)(CPUOpenRISCState *env, uint32_t val)
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{
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uint32_t ftois;
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OpenRISCCPU *cpu = openrisc_env_get_cpu(env);
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set_float_exception_flags(0, &cpu->env.fp_status);
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ftois = float32_to_int32(val, &cpu->env.fp_status);
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update_fpcsr(cpu);
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return ftois;
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}
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#define FLOAT_OP(name, p) void helper_float_##_##p(void)
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#define FLOAT_CALC(name) \
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uint64_t helper_float_ ## name ## _d(CPUOpenRISCState *env, \
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uint64_t fdt0, uint64_t fdt1) \
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{ \
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uint64_t result; \
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OpenRISCCPU *cpu = openrisc_env_get_cpu(env); \
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set_float_exception_flags(0, &cpu->env.fp_status); \
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result = float64_ ## name(fdt0, fdt1, &cpu->env.fp_status); \
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update_fpcsr(cpu); \
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return result; \
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} \
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\
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uint32_t helper_float_ ## name ## _s(CPUOpenRISCState *env, \
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uint32_t fdt0, uint32_t fdt1) \
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{ \
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uint32_t result; \
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OpenRISCCPU *cpu = openrisc_env_get_cpu(env); \
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set_float_exception_flags(0, &cpu->env.fp_status); \
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result = float32_ ## name(fdt0, fdt1, &cpu->env.fp_status); \
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update_fpcsr(cpu); \
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return result; \
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} \
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FLOAT_CALC(add)
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FLOAT_CALC(sub)
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FLOAT_CALC(mul)
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FLOAT_CALC(div)
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FLOAT_CALC(rem)
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#undef FLOAT_CALC
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#define FLOAT_TERNOP(name1, name2) \
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uint64_t helper_float_ ## name1 ## name2 ## _d(CPUOpenRISCState *env, \
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uint64_t fdt0, \
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uint64_t fdt1) \
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{ \
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uint64_t result, temp, hi, lo; \
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uint32_t val1, val2; \
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OpenRISCCPU *cpu = openrisc_env_get_cpu(env); \
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hi = env->fpmaddhi; \
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lo = env->fpmaddlo; \
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set_float_exception_flags(0, &cpu->env.fp_status); \
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result = float64_ ## name1(fdt0, fdt1, &cpu->env.fp_status); \
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lo &= 0xffffffff; \
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hi &= 0xffffffff; \
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temp = (hi << 32) | lo; \
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result = float64_ ## name2(result, temp, &cpu->env.fp_status); \
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val1 = result >> 32; \
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val2 = (uint32_t) (result & 0xffffffff); \
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update_fpcsr(cpu); \
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cpu->env.fpmaddlo = val2; \
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cpu->env.fpmaddhi = val1; \
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return 0; \
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} \
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\
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uint32_t helper_float_ ## name1 ## name2 ## _s(CPUOpenRISCState *env, \
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uint32_t fdt0, uint32_t fdt1) \
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{ \
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uint64_t result, temp, hi, lo; \
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uint32_t val1, val2; \
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OpenRISCCPU *cpu = openrisc_env_get_cpu(env); \
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hi = cpu->env.fpmaddhi; \
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lo = cpu->env.fpmaddlo; \
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set_float_exception_flags(0, &cpu->env.fp_status); \
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result = float64_ ## name1(fdt0, fdt1, &cpu->env.fp_status); \
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temp = (hi << 32) | lo; \
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result = float64_ ## name2(result, temp, &cpu->env.fp_status); \
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val1 = result >> 32; \
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val2 = (uint32_t) (result & 0xffffffff); \
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update_fpcsr(cpu); \
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cpu->env.fpmaddlo = val2; \
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cpu->env.fpmaddhi = val1; \
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return 0; \
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}
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FLOAT_TERNOP(mul, add)
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#undef FLOAT_TERNOP
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#define FLOAT_CMP(name) \
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uint64_t helper_float_ ## name ## _d(CPUOpenRISCState *env, \
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uint64_t fdt0, uint64_t fdt1) \
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{ \
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int res; \
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OpenRISCCPU *cpu = openrisc_env_get_cpu(env); \
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set_float_exception_flags(0, &cpu->env.fp_status); \
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res = float64_ ## name(fdt0, fdt1, &cpu->env.fp_status); \
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update_fpcsr(cpu); \
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return res; \
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} \
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\
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uint32_t helper_float_ ## name ## _s(CPUOpenRISCState *env, \
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uint32_t fdt0, uint32_t fdt1)\
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{ \
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int res; \
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OpenRISCCPU *cpu = openrisc_env_get_cpu(env); \
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set_float_exception_flags(0, &cpu->env.fp_status); \
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res = float32_ ## name(fdt0, fdt1, &cpu->env.fp_status); \
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update_fpcsr(cpu); \
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return res; \
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}
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FLOAT_CMP(le)
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FLOAT_CMP(eq)
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FLOAT_CMP(lt)
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#undef FLOAT_CMP
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#define FLOAT_CMPNE(name) \
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uint64_t helper_float_ ## name ## _d(CPUOpenRISCState *env, \
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uint64_t fdt0, uint64_t fdt1) \
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{ \
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int res; \
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OpenRISCCPU *cpu = openrisc_env_get_cpu(env); \
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set_float_exception_flags(0, &cpu->env.fp_status); \
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res = !float64_eq_quiet(fdt0, fdt1, &cpu->env.fp_status); \
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update_fpcsr(cpu); \
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return res; \
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} \
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\
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uint32_t helper_float_ ## name ## _s(CPUOpenRISCState *env, \
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uint32_t fdt0, uint32_t fdt1) \
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{ \
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int res; \
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OpenRISCCPU *cpu = openrisc_env_get_cpu(env); \
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set_float_exception_flags(0, &cpu->env.fp_status); \
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res = !float32_eq_quiet(fdt0, fdt1, &cpu->env.fp_status); \
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update_fpcsr(cpu); \
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return res; \
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}
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FLOAT_CMPNE(ne)
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#undef FLOAT_CMPNE
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#define FLOAT_CMPGT(name) \
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uint64_t helper_float_ ## name ## _d(CPUOpenRISCState *env, \
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uint64_t fdt0, uint64_t fdt1) \
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{ \
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int res; \
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OpenRISCCPU *cpu = openrisc_env_get_cpu(env); \
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set_float_exception_flags(0, &cpu->env.fp_status); \
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res = !float64_le(fdt0, fdt1, &cpu->env.fp_status); \
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update_fpcsr(cpu); \
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return res; \
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} \
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\
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uint32_t helper_float_ ## name ## _s(CPUOpenRISCState *env, \
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uint32_t fdt0, uint32_t fdt1) \
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{ \
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int res; \
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OpenRISCCPU *cpu = openrisc_env_get_cpu(env); \
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set_float_exception_flags(0, &cpu->env.fp_status); \
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res = !float32_le(fdt0, fdt1, &cpu->env.fp_status); \
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update_fpcsr(cpu); \
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return res; \
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}
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FLOAT_CMPGT(gt)
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#undef FLOAT_CMPGT
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#define FLOAT_CMPGE(name) \
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uint64_t helper_float_ ## name ## _d(CPUOpenRISCState *env, \
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uint64_t fdt0, uint64_t fdt1) \
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{ \
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int res; \
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OpenRISCCPU *cpu = openrisc_env_get_cpu(env); \
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set_float_exception_flags(0, &cpu->env.fp_status); \
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res = !float64_lt(fdt0, fdt1, &cpu->env.fp_status); \
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update_fpcsr(cpu); \
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return res; \
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} \
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\
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uint32_t helper_float_ ## name ## _s(CPUOpenRISCState *env, \
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uint32_t fdt0, uint32_t fdt1) \
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{ \
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int res; \
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OpenRISCCPU *cpu = openrisc_env_get_cpu(env); \
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set_float_exception_flags(0, &cpu->env.fp_status); \
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res = !float32_lt(fdt0, fdt1, &cpu->env.fp_status); \
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update_fpcsr(cpu); \
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return res; \
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}
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FLOAT_CMPGE(ge)
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#undef FLOAT_CMPGE
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